Commit graph

40109 commits

Author SHA1 Message Date
Kevin Hilman
d7814e4df6 PM debug: allow configurable wakeup from suspend on OMAP GPtimer
Using debugfs, export a configurable wakeup timer to be used to
wakeup system from suspend.

If a non-zero value is written to
/debug/pm_debug/wakeup_timer_seconds, A timer wakeup event will wake
the system and resume after the configured number of seconds.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:28 -08:00
Kevin Hilman
c40552bc82 OMAP3: PM debug: allow runtime toggle of PM features
Allow enable/disable of low-power states during idle.  To
enable low-power idle:

   echo 1 > /debug/pm_debug/sleep_while_idle

 to disable:

   echo 0 > /debug/pm_debug/sleep_while_idle

Also allow enable/disable of OFF-mode.  To enable:

   echo 1 > /debug/pm_debug/enable_off_mode

 to disable:

   echo 0 > /debug/pm_debug/enable_off_mode

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:27 -08:00
Peter 'p2' De Schrijver
89139dce8a OMAP3: PM: Wait for SDRC ready iso a blind delay
This patch improves the wakeup SRAM code polling the SDRC to become ready
instead of just waiting for a fixed amount of time.

Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:27 -08:00
Kalle Jokiniemi
867d320b6c PM: Disable usb host HW save and restore
The hardware SAVEANDRESTORE mechanism seems to leave
USB HOST power domain permanently into active state
after one transition from off to active state.
Disabling for now.

Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:27 -08:00
Aaro Koskinen
2329e7cc0d OMAP3: PM: Fix INTC context save/restore
Wrong index was used for ILR.

Signed-off-by: Aaro Koskinen <Aaro.Koskinen@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:27 -08:00
Tero Kristo
0795a75a36 OMAP3: PM: SDRC auto-refresh workaround for off-mode
Errata: ES3.0, ES3.1 SDRC not sending auto-refresh when OMAP wakes-up
from OFF mode

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:27 -08:00
Juha Yrjola
692ec4abb9 OMAP: Store reboot mode in scratchpad on OMAP34xx
The reboot mode can be communicated to a bootloader (or the
kernel itself) with a scratchpad register. This functionality
is especially useful, if userspace is allowed to change
the reboot mode.

Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:26 -08:00
Aaro Koskinen
bf07c9f2d8 OMAP: PM: Clear DMA channel state after a wakeup
Clear DMA channel states so that users can assume a known initial
state.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:26 -08:00
Kalle Jokiniemi
cb0cb2b815 OMAP3: PM: Fix PLL_MOD CLKEN offset in scratchpad
The CM_CLKEN_PLL register saved in scratchpad memory
was wrongly using offset of 0x0004 instead of 0x0000.

The effect of this was that boot ROM code would
restore the wrong value when waking up from off mode.
This wrong value, however, will be overwritten by
prcm context restore. Still, a short period of wrong
clock settings in CM_CLKEN_PLL remained between ROM
code and prcm context restore. This is fixed by the
patch.

Problem reported by: Jouni Hogander <jouni.hogander@nokia.com>

Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:26 -08:00
Kalle Jokiniemi
8a917d2fc8 ARM: OMAP: SMS: save/restore of SMS_SYSCONFIG for off-mode
The SMS_SYSCONFIG register gets reset in off mode, added a
save/restore mechanism for that.

Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:26 -08:00
Kalle Jokiniemi
ba50ea7eb9 OMAP3: PM: Fix secure SRAM context save/restore
The secure sram context save uses dma channels 0 and 1.
In order to avoid collision between kernel DMA transfers and
ROM code dma transfers, we need to reserve DMA channels 0
1 on high security devices.

A bug in ROM code leaves dma irq status bits uncleared.
Hence those irq status bits need to be cleared when restoring
DMA context after off mode.

There was also a faulty parameter given to PPA in the secure
ram context save assembly code, which caused interrupts to
be enabled during secure ram context save. This caused the
save to fail sometimes, which resulted the saved context
to be corrupted, but also left DMA channels in secure mode.
The secure mode DMA channels caused "DMA secure error with
device 0" errors to be displayed.

Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:26 -08:00
Jouni Hogander
133464dc30 OMAP3: PM: Save and restore also CM_CLKSEL1_PLL_IVA2
CM_CLKSEL1_PLL_IVA2 is not saved/restored currently. This patch is
adding save and restore for it.

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Tero Kristo
13a6fe0f6a OMAP3: PM: Enable SDRAM auto-refresh during sleep
Fix for ES3.0 bug: SDRC not sending auto-refresh when OMAP wakes-up
from OFF mode (warning for HS devices.)

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Tero Kristo
9d97140bd0 OMAP3: PM: save secure RAM only during init
The function omap3_save_secure_ram() is now called only once during
the initialization of the device and consequent sleep cycles will
re-use the same saved contents for secure RAM. Users who need secure
services should do secure RAM saving before entering off-mode, if a
secure service has been accessed after last save.

There are both latency and reliability issues with saving secure RAM
context in the idle path. The context save uses a hardware resource
which takes an order of hundreds of milliseconds to initialize after a
wake up from off-mode, and also there is no way of checking whether it
is ready from kernel side or not. It just crashes if you use it too
quickly

Additional fix to ensure scratchpad save is done after secure
RAM by Roger Quadros.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Tero Kristo
27d59a4a2d OMAP3 PM: off-mode support for HS/EMU devices
For HS/EMU devices, some additional resources need to be
saved/restored for off-mode support.  Namely, saving the secure RAM
and a pointer to it in the scratchpad.

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Tero Kristo
f2d1185824 OMAP: PM: DMA context save/restore for off-mode support
For HS/EMU devices, these additional features are also used:

- DMA interrupt disable routine added
- Added DMA controller reset to DMA context restore

Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Rajendra Nayak
2f5939c3ec OMAP3: PM: CORE domain off-mode support
Add context save and restore for CORE powerdomain resources in order
to support off-mode.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Rajendra Nayak
61255ab9e8 OMAP3: PM: MPU off-mode support
Adds a 'save_state' option when calling into SRAM idle function
and adds some minor cleanups of SRAM asm code.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:25 -08:00
Rajendra Nayak
57f277b012 OMAP3: PM: Restore MMU table entry
During the MMU restoration on the restore path from MPU OFF, the page
table entry for the page consisting of the code being executed is
modified to make MMU return VA=PA.

The MMU is then enabled and the original entry is being stored in
scratchpad.  This patch reads the original values stored in
scratchpad, and restores them back.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:24 -08:00
Rajendra Nayak
fa3c2a4fc9 OMAP3: PM: handle PER/NEON/CORE in idle
Expand the powerdomains handled in the idle path to include PER, NEON
and CORE.  This includes properly clearing the previous powerstates,
linking NEON state to MPU state and calling the UART prepare functions
for only the appropraite powerdomain transitions (CORE for UART1,2,
PER for UART3.)

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:24 -08:00
Rajendra Nayak
3231fc889c OMAP3: PM: restore SRAM functions after off-mode.
Generalize the copy of SRAM functions into omap_push_sram_idle()
so it can be used on init but also after off-mode transitions.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:24 -08:00
Rajendra Nayak
c96631e138 OMAP3: PM: SCM context save/restore
Add context save and restore for the System Control Module to suport
off-mode.

ETK and debobs definitions added by Peter De Schrijver.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:24 -08:00
Rajendra Nayak
8014078684 OMAP3: PM: Populate scratchpad contents
This patch populates the scratchpad contents as expected by the
bootROM code.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:42:24 -08:00
Rajendra Nayak
c171a25861 OMAP3: PM: PRCM context save/restore
Add context save and restore for PRCM module to support off-mode.
Additional registers (CM_CLKSEL4, CM_CLKEN, CM_CLKEN2) added by Tero
Kristo.

Missing CM_CLKEN_PLL_IVA2 register added by Kalle Jokiniemi.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:40:13 -08:00
Rajendra Nayak
0addd61bc2 OMAP3: PM: INTC context save/restore
Add context save and restore for the INTC module to support off-mode.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:40:12 -08:00
Rajendra Nayak
40c670f031 OMAP3: PM: GPIO context save/restore
Add context save and restore to enable off-mode.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:40:12 -08:00
Rajendra Nayak
a2d3e7bad8 OMAP3: PM: GPMC context save/restore
This patch adds the context save and restore functions for GPMC to
enable off-mode.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-11-11 14:40:12 -08:00
Tony Lindgren
774facda20 Merge branch '7xx-iosplit-plat' with omap-fixes 2009-11-10 18:10:34 -08:00
Linus Torvalds
79051db9ae Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91
* 'for-linus' of git://github.com/at91linux/linux-2.6-at91:
  at91: at91sam9g45 family: identify several chip versions
  avr32: add two new at91 to cpu.h definition
2009-11-03 11:15:25 -08:00
Nicolas Ferre
d8951adeba at91: at91sam9g45 family: identify several chip versions
cpu_is_xxx() macros are identifying generic at91sam9g45 chip. This patch adds
the capacity to differentiate Engineering Samples and final lots through the
inclusion of  at91_cpu_fully_identify() and the related chip IDs with chip
version field preserved.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
2009-11-03 18:42:31 +01:00
Nicolas Ferre
2f5d46d2f6 avr32: add two new at91 to cpu.h definition
Somme common drivers will need those at91 cpu_is_xxx() definitions. As
at91sam9g10 and at91sam9g45 are on the way to linus' tree, here is the patch
that adds those chips to cpu.h in AVR32 architecture.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-11-03 18:36:35 +01:00
Linus Torvalds
9ddfd92909 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (38 commits)
  MIPS: O32: Fix ppoll
  MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
  MIPS: Alchemy: Fix hang with high-frequency edge interrupts
  MIPS: TXx9: Fix spi-baseclk value
  MIPS: bcm63xx: Set the correct BCM3302 CPU name
  MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store
  MIPS: Avoid potential hazard on Context register
  MIPS: Octeon: Use lockless interrupt controller operations when possible.
  MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity
  MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache
  MIPS: SMTC: Avoid queing multiple reschedule IPIs
  MIPS: GCMP: Avoid accessing registers when they are not present
  MIPS: GIC: Random fixes and enhancements.
  MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start
  MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands
  MIPS: SPRAM: Clean up support code a little
  MIPS: 1004K: Enable SPRAM support.
  MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
  MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.
  MIPS: MTI: Fix accesses to device registers on MIPS boards
  ...
2009-11-03 08:09:57 -08:00
Linus Torvalds
fcef24d38e Merge branch 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux
* 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux:
  ARM: S3C2410: Fix sparse warnings in arch/arm/mach-s3c2410/gpio.c
  ARM: S3C2440: mini2440: Fix spare warnings
  ARM: S3C24XX: Fix warnings in arch/arm/plat-s3c24xx/gpio.c
  ARM: S3C2440: mini2440: Fix missing CONFIG_S3C_DEV_USB_HOST
  ARM: S3C24XX: arch/arm/plat-s3c24xx: Move dereference after NULL test
  ARM: S3C: Fix adc function exports
  ARM: S3C2410: Fix link if CONFIG_S3C2410_IOTIMING is not set
  ARM: S3C24XX: Introduce S3C2442B CPU
  ARM: S3C24XX: Define a macro to avoid compilation error
  ARM: S3C: Add info for supporting circular DMA buffers
  ARM: S3C64XX: Set rate of crystal mux
  ARM: S3C64XX: Fix S3C64XX_CLKDIV0_ARM_MASK value
2009-11-03 07:46:05 -08:00
Linus Torvalds
333a07437c Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
  Revert "[IA64] fix percpu warnings"
  [IA64] fix percpu warnings
  [IA64] SMT friendly version of spin_unlock_wait()
  [IA64] use printk_once() unaligned.c/io_common.c
  [IA64] Require SAL 3.2 in order to do extended config space ops
  [IA64] unsigned cannot be less than 0 in sn_hwperf_ioctl()
  [IA64] Restore registers in the stack on INIT
  [IA64] Re-implement spinaphores using ticket lock concepts
  [IA64] Squeeze ticket locks back into 4 bytes.
2009-11-02 10:22:25 -08:00
Linus Torvalds
c35102c3e1 Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: ensure initial page tables are setup for SMP systems
  ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind support.
  ARM: 5774/1: Fix Realview ARM1176PB board reboot
  ARM: Fix errata 411920 workarounds
  ARM: Fix sparsemem with SPARSEMEM_EXTREME enabled
  ARM: Use GFP_DMA only for masks _less_ than 32-bit
  ARM: integrator: allow Integrator to be built with highmem
  ARM: Fix signal restart issues with NX and OABI compat
2009-11-02 09:53:19 -08:00
Linus Torvalds
efcd9e0b91 Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Make EFI RTC function depend on 32bit again
  x86-64: Fix register leak in 32-bit syscall audting
  x86: crash_dump: Fix non-pae kdump kernel memory accesses
  x86: Side-step lguest problem by only building cmpxchg8b_emu for pre-Pentium
  x86: Remove STACKPROTECTOR_ALL
2009-11-02 09:45:17 -08:00
Tony Luck
e8c93fc7b7 Revert "[IA64] fix percpu warnings"
This reverts commit b94b08081f.

genksyms currently cannot handle complicated types for exported
percpu variables.  Drop this patch for now as it prevents a
module from being loaded on sn2 systems:

 xpc: no symbol version for per_cpu____sn_cnodeid_to_nasid
 xpc: Unknown symbol per_cpu____sn_cnodeid_to_nasid

Signed-off-by: Tony Luck <tony.luck@intel.com>
2009-11-02 09:23:08 -08:00
Russell King
4b46d64165 ARM: ensure initial page tables are setup for SMP systems
Mapping the same memory using two different attributes (memory
type, shareability, cacheability) is unpredictable.  During boot,
we encounter a situation when we're updating the kernel's page
tables which can lead to dirty cache lines existing in the cache
which are subsequently missed.  This causes stack corruption,
and therefore a crash.

Therefore, ensure that the shared and cacheability settings
matches the configuration that will be used later; this together
with the restriction in early_cachepolicy() ensures that we won't
create a mismatch during boot.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02 16:59:59 +00:00
Claudio Scordino
6603a4fd51 ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind support.
ARM unwind is known to compile only with EABI and not-buggy compilers.
The problem is not the unwinding information but the -fno-frame-pointer
option added as a result of !CONFIG_FRAME_POINTER.  Now we check the
compiler and raise a #warning in case of wrong compiler.

Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02 16:59:45 +00:00
Arnaud Patard
049a31afe1 MIPS: O32: Fix ppoll
sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32
user-space.

Signed-off-by: Arnaud Patard <apatard@mandriva.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Wu Zhangjin
55f4e1d4fe MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
Unify the naming method between kernel and the user-space oprofile tool.
Because loongson is used instead of godson in most of the places, we agreed
to use loongson instead, which will simplify future maintenance.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Manuel Lauss
44f2c586a3 MIPS: Alchemy: Fix hang with high-frequency edge interrupts
The handle_edge_irq() flowhandler disables edge int sources which occur
too fast (i.e. another edge comes in before the irq handler function
had a chance to finish).  Currently, the mask_ack() callback does not
ack the edges in hardware, leading to an endless loop in the flowhandler
where it tries to shut up the irq source.

When I rewrote the alchemy IRQ code  I wrongly assumed the mask_ack()
callback was only used by the level flowhandler, hence it omitted the
(at the time pointless) edge acks.  Turned out I was wrong; so here
is a complete mask_ack implementation for Alchemy IC, which fixes
the above mentioned problem.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Atsushi Nemoto
fcc152f3bf MIPS: TXx9: Fix spi-baseclk value
TXx9 SPI bit rate is calculated by:
	fBR = fSPI / 2 / (n + 1)
	(fSPI is SPI master clock freq, i.e. imbusclk freq.)
So use imbus_clk / 2 as a spi-baseclk.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Florian Fainelli
2b5b9b786c MIPS: bcm63xx: Set the correct BCM3302 CPU name
For consistency with other BCM63xx SoC set the CPU name to "Broadcom
BCM6338" when actually running on that system.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Zhang Le
e8d4c342e5 MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store
Loongson 2 does not have dcache aliases when is using 16k pages. and the

And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does
not matter here.

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Ralf Baechle
c2ea1d56ea MIPS: Avoid potential hazard on Context register
set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
David Daney
cd847b7857 MIPS: Octeon: Use lockless interrupt controller operations when possible.
Some newer Octeon chips have registers that allow lockless operation of
the interrupt controller.  Take advantage of them.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
David Daney
b6b74d5490 MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity
Since the locks are used from interrupt context we need the
irqsave/irqrestore versions of the locking functions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Ralf Baechle
0db2b74e91 MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00
Jaidev Patwardhan
2e41f91d9e MIPS: SMTC: Avoid queing multiple reschedule IPIs
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00