Commit graph

3165 commits

Author SHA1 Message Date
Wu Zhangjin
1b39a0bad5 MIPS: Loongson: Lemote-2F: Get the machine type from PMON_VER
Lemote have used the PMON_VER strings to indicate the loongson-2f
machine series:

 	PMON_VER=LM8089		Lemote 8.9'' netbook
 	         LM8101		Lemote 10.1'' netbook
 	(The above two netbooks have the same kernel support)
	         LM6XXX		Lemote FuLoong(2F) box series
	         LM9XXX		Lemote LynLoong PC series

Before the machtype is supported by the PMON, we can get the machine
type from the PMON_VER for these machines, this will help the users a
lot.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/821/
Patchwork: http://patchwork.linux-mips.org/patch/908/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:09 +01:00
David Daney
dbb103b243 MIPS: Octeon: Fix EOI handling.
If an interrupt handler disables interrupts, the EOI function will
just reenable them.  This will put us in an endless loop when the
upcoming Ethernet driver patches are applied.

Only reenable the interrupt on EOI if it is not IRQ_DISABLED.  This
requires that the EOI function be separate from the ENABLE function.
We also rename the ACK functions to correspond with their function.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: gregkh@suse.de
Patchwork: http://patchwork.linux-mips.org/patch/840/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:06 +01:00
David Daney
6b07d38aaa MIPS: Octeon: Use optimized memory barrier primitives.
In order to achieve correct synchronization semantics, the Octeon port
had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC.  This resulted in code
that looks like:

   sync
   ll ...
   .
   .
   .
   sc ...
   .
   .
   sync

The second SYNC was redundant, but harmless.

Octeon has a SYNCW instruction that acts as a write-memory-barrier
(due to an erratum in some parts two SYNCW are used).  It is much
faster than SYNC because it imposes ordering on the writes, but
doesn't otherwise stall the execution pipeline.  On Octeon, SYNC
stalls execution until all preceeding writes are committed to the
coherent memory system.

Using:

    syncw;syncw
    ll
    .
    .
    .
    sc
    .
    .

Has identical semantics to the first sequence, but is much faster.
The SYNCW orders the writes, and the SC will not complete successfully
until the write is committed to the coherent memory system.  So at the
end all preceeding writes have been committed.  Since Octeon does not
do speculative reads, this functions as a full barrier.

The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes
SYNCW for SYNC in write-memory-barriers.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/850/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:06 +01:00
David Daney
f252ffd50c MIPS: New macro smp_mb__before_llsc.
Replace some instances of smp_llsc_mb() with a new macro
smp_mb__before_llsc().  It is used before ll/sc sequences that are
documented as needing write barrier semantics.

The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(),
so there are no changes in semantics.

Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just
barrier() in the non-SMP case.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/851/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:06 +01:00
David Daney
ec5380c768 MIPS: Remove unused macros from barrier.h
The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree,
remove them.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/848/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:05 +01:00
David Daney
d957705446 MIPS: Octeon: Register some devices on the I2C bus.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: linux-i2c@vger.kernel.org
To: ben-linux@fluff.org
To: khali@linux-fr.org
Cc: Rade Bozic <rade.bozic.ext@nsn.com>
Patchwork: http://patchwork.linux-mips.org/patch/845/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:05 +01:00
David Daney
f41c3c1b3e MIPS: Octeon: Add I2C platform device.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: linux-i2c@vger.kernel.org
To: ben-linux@fluff.org
To: khali@linux-fr.org
Cc: Rade Bozic <rade.bozic.ext@nsn.com>
Patchwork: http://patchwork.linux-mips.org/patch/847/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:04 +01:00
Robert P. J. Day
d38760ccdf MIPS: Simplify param.h by using <asm-generic/param.h>
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/810/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:04 +01:00
Manuel Lauss
32fd6901a6 MIPS: Alchemy: get rid of common/reset.c
Implement reset / poweroff in the board code instead.  The peripheral reset
code is gone too since YAMON which all in-tree boards use does the same
work when it boots.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/783/
Patchwork: http://patchwork.linux-mips.org/patch/882/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:04 +01:00
David Daney
325f8a0a31 MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.
For 64-bit kernels with 64KB pages and two level page tables, there are
42 bits worth of virtual address space This is larger than the 40 bits of
virtual address space obtained with the default 4KB Page size and three
levels, so there are no draw backs for using two level tables with this
configuration.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/761/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:03 +01:00
Manuel Lauss
ef6c1fd662 MIPS: Alchemy: irq: use runtime CPU type detection
Use runtime CPU detection instead of relying on preprocessor symbols.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:03 +01:00
Manuel Lauss
5d400f5c59 MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus
Use the GPIO config symbol to only build Au1000 interrupt code on chips with
compatible hw.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Manuel Lauss
70f82f2c59 MIPS: Alchemy: use runtime cpu detection in GPIO code.
Remove the cpu subtype cpp macros in favor of runtime detection,
to improve compile coverage of the alchemy common code.
(Increases kernel size by 700 bytes).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:02 +01:00
Florian Fainelli
66f75ccb85 MIPS: Alchemy: Add au1000-eth platform device
This patch makes the board code register the au1000-eth platform device. The
au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg
function like it has to be done for the Bosporus board which uses a
different MAC/PHY setup.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: David Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
cf6e47e032 MIPS: Alchemy: DB1200 defconfig update
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
05ae323180 MIPS/SOUND: Alchemy: DB1200 AC97+I2S audio support.
Machine driver for DB1200 AC97 and I2S audio systems, intended as a proper
reference asoc machine for Alchemy-based systems.  AC97/I2S can be selected
at boot time by setting switch S6.7.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: alsa-devel@alsa-project.org
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:01 +01:00
Manuel Lauss
63323ec54a MIPS: Alchemy: Extended DB1200 board support.
Create own directory for DB1200 code and update it with new features.

- SPI support:
  - tmp121 temperature sensor
  - SPI flash on DB1200
- I2C support
  - NE1619 sensor
  - AT24 eeprom
- I2C/SPI can be selected at boot time via switch S6.8
- Carddetect IRQs for SD cards.
- gen_nand based NAND support.
- hexleds count sleep/wake transitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:00 +01:00
Manuel Lauss
206aa6cdad MIPS: Alchemy: physmap-flash for all devboards
Replace the devboard NOR MTD mapping driver with physmap-flash support.
Also honor the "swapboot" switch settings wrt. to the layout of the
NOR partitions.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:59 +01:00
Ralf Baechle
8facefd090 MIPS: Don't include <linux/smp_lock.h> unnecessarily.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:57 +01:00
Manuel Lauss
63ea336b79 MIPS: Alchemy: UARTs are of type 16550A
UART autodetection breaks on the Au1300 but the IP blocks are identical,
at least according to the datasheets.  Help the 8250 driver by passing
on uart type information via platform data.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Florian Fainelli
c55736af44 MIPS: Alchemy: Turn on -Werror for devboards and xss1500
Warnings being suppressed, we can now turn on -Werror for boards which did
not have it already (devboards and xss1500).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Florian Fainelli
32fc0adeb8 MIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup code
This patch fixes warnings due to potentially unused
variables in board setup code or mixed variables
declaration and code (forbidden by ISO C90).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:56 +01:00
Manuel Lauss
66a1d9baf4 MIPS: Alchemy: remove unused SYS area structure
Nothing in-tree uses it, so get rid of it.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
b6e6d120c8 MIPS: Alchemy: get rid of superfluous UART definitions
Remove unused uart bit definitions and base macros.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
8402a1588a MIPS: Alchemy: prom_putchar is board dependent
This patch replaces the general alchemy prom_putchar() implementation
in favor of board-specific versions:  The UART where the output of
prom_putchar is directed to really depends on the board, the current
implementation hardcodes this on a per-SoC basis which is just wrong.

So a generic uart tx function is provided in the alchemy headers,
and the boards can provide their own prom_putchar with custom
destination uart, and all in-kernel alchemy boards support
early printk.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
963accbc82 MIPS: Alchemy: change dbdma to accept physical memory addresses
DMA can only be done from physical addresses; move the "virt_to_phys"
source/destination buffer address translation from the dbdma queueing
functions (since the hardware can only DMA to/from physical addresses)
to their respective users.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:55 +01:00
Manuel Lauss
ea071cc705 MIPS: Alchemy: remove dbdma compat macros
Remove dbdma compat macros, move remaining users over to default
queueing functions and -flags.

(Queueing function signature has changed in order to give
 a build failure instead of silent functional changes due
 to the no longer implicitly specified DDMA_FLAGS_IE flag)

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:54 +01:00
Manuel Lauss
f1fc6645a4 MIPS: Alchemy: reduce size of irq dispatcher
By replacing an extra do_IRQ with a goto, the assembly shrinks
from 260 to 212 bytes (gcc-4.3.4).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:53 +01:00
Manuel Lauss
788144656b MIPS: Alchemy: Stop IRQ name sharing
Eliminate the sharing of IRQ names among the differenct Alchemy
variants.  IRQ numbers need no longer be hidden behind a
CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy
code less reliant on a hardcoded subtype.

This patch also renames the GPIO irq number constants. It's really
an interrupt line, NOT a GPIO number!

Code which relied on certain irq numbers to have the same name
across all supported cpu subtypes is changed to determine current
cpu subtype at runtime; in some places this isn't possible so
a "compat" symbol is used.

Run-tested on DB1200.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:53 +01:00
Manuel Lauss
93e9cd8485 MIPS: Alchemy: Simple cpu subtype detector
Extract the alchemy chip variant from c0_prid register.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/14/
Patchwork: http://patchwork.linux-mips.org/patch/707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
0a0b1295ef MIPS: Alchemy: higher priority for system timer.
Raise RTCMATCH2 interrupt priority in case it is used as the system
timer tick.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
5047201b56 MIPS: Alchemy: Remove USB_DEV_REQ_INT prioritization hack
The Alchemy hardware provides a method to prioritize interrupts
on a controller by assigning them to a differenct core request line.
Assign usb device request interrupt to IC0 Request 0 (which has
highest priority in the core and the dispatcher) and others to
Request 1.  The explicit check for usb device request occurrence
should be obsolete now.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:52 +01:00
Manuel Lauss
0273b4efcc MIPS: Alchemy: XXS1500 PCMCIA driver rewrite
Rewritten XXS1500 PCMCIA socket driver, standalone (doesn't depend on
au1000_generic.c) and added carddetect IRQ support.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
27dd65ac9a MIPS: Alchemy: devboards: wire up new PCMCIA driver.
Register the PCMCIA driver on all boards supported by it,
get rid of now-unused pcmcia macros in the board headers
(and subsequently empty pb1100/pb1500 ones).

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
66213b3ccf MIPS: PCMCIA: new socket driver for Au1000 demoboards.
New PCMCIA socket driver for all Db/Pb1xxx boards (except Pb1000),
which replaces au1000_db1x00.c and (most of) au1000_pb1x00.c.
Notable improvements:
        - supports Db1000, DB/PB1100/1500/1550/1200.
        - support for carddetect and statuschange IRQs.
        - pcmcia socket mem/io/attr areas and irqs passed through
          platform resource information.
        - doesn't freeze system during card insertion/ejection like
          the one it replaces.
        - boardtype is automatically detected using BCSR ID register.

Run-tested on the DB1200.

Cc: Linux-PCMCIA <linux-pcmcia@lists.infradead.org>
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:51 +01:00
Manuel Lauss
7e50b2b741 MIPS: Alchemy: remove board_init_irq() function.
remove board_init_irq():  On all in-kernel boards it is sufficient to
initialize board interrupts in an arch_initcall by using the default
linux irq functions.

Some small irqmap.c files have been folded into board_setup files.

Run-tested on DB1200; compile-tested on all other affected boards.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
95a437966d MIPS: Alchemy: devboards: factor out PB1200 IRQ cascade code.
Move the PB1200 IRQ cascade code out to the BCSR support code:
upcoming DB1300 support can use it too.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Manuel Lauss
9bdcf336d0 MIPS: Alchemy: devboard register abstraction
All Alchemy development boards have external CPLDs with a few registers
in them.  They all share an identical register layout with only a few
minor differences (except the PB1000) in bit functions and base
addresses.

This patch
- adds a primitive facility to initialize and use these external
  registers,
- replaces all occurrences of bcsr->xxx accesses with calls to the new
  functions (the pb1200 cascade irq handling code is special).
- collects BCSR register information scattered throughout the board
  headers in a central place.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:50 +01:00
Ralf Baechle
ebc89718a4 MIPS: Fix build error for uncompressed non-plain vmlinux kernels
Seen on rm200_defconfig for example:

  CC      arch/mips/boot/compressed/decompress.o
/home/ralf/src/linux/upstream-linus/arch/mips/boot/compressed/decompress.c: In function ‘decompress_kernel’:
/home/ralf/src/linux/upstream-linus/arch/mips/boot/compressed/decompress.c:116: error: implicit declaration of function ‘decompress’
make[3]: *** [arch/mips/boot/compressed/decompress.o] Error 1
make[2]: *** [vmlinuz.ecoff] Error 2
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:52:49 +01:00
Linus Torvalds
68c6b85984 Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (48 commits)
  x86/PCI: Prevent mmconfig memory corruption
  ACPI: Use GPE reference counting to support shared GPEs
  x86/PCI: use host bridge _CRS info by default on 2008 and newer machines
  PCI: augment bus resource table with a list
  PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs
  PCI: read bridge windows before filling in subtractive decode resources
  PCI: split up pci_read_bridge_bases()
  PCIe PME: use pci_pcie_cap()
  PCI PM: Run-time callbacks for PCI bus type
  PCIe PME: use pci_is_pcie()
  PCI / ACPI / PM: Platform support for PCI PME wake-up
  ACPI / ACPICA: Multiple system notify handlers per device
  ACPI / PM: Add more run-time wake-up fields
  ACPI: Use GPE reference counting to support shared GPEs
  PCI PM: Make it possible to force using INTx for PCIe PME signaling
  PCI PM: PCIe PME root port service driver
  PCI PM: Add function for checking PME status of devices
  PCI: mark is_pcie obsolete
  PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges
  PCI: pciehp: second try to get big range for pcie devices
  ...
2010-02-26 10:35:27 -08:00
Dominik Brodowski
3b7a17fcda resource/PCI: mark struct resource as const
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22 16:16:57 -08:00
Dominik Brodowski
b26b2d494b resource/PCI: align functions now return start of resource
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22 16:16:56 -08:00
Hauke Mehrtens
84a6fcb368 MIPS: BCM47xx: Fix 128MB RAM support
Ignoring the last page when ddr size is 128M. Cached accesses to last page
is causing the processor to prefetch using address above 128M stepping out
of the DDR address space.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/981/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-22 21:42:12 +01:00
Yoichi Yuasa
52ab320ac5 MIPS: Highmem: Fix build error
arch/mips/mm/highmem.c: In function 'kmap_init':
arch/mips/mm/highmem.c:130: error: 'init_mm' undeclared (first use in this function)
arch/mips/mm/highmem.c:130: error: (Each undeclared identifier is reported only once
arch/mips/mm/highmem.c:130: error: for each function it appears in.)

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/980/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-22 21:42:11 +01:00
Russell King
4b3073e1c5 MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself
On VIVT ARM, when we have multiple shared mappings of the same file
in the same MM, we need to ensure that we have coherency across all
copies.  We do this via make_coherent() by making the pages
uncacheable.

This used to work fine, until we allowed highmem with highpte - we
now have a page table which is mapped as required, and is not available
for modification via update_mmu_cache().

Ralf Beache suggested getting rid of the PTE value passed to
update_mmu_cache():

  On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
  to construct a pointer to the pte again.  Passing a pte_t * is much
  more elegant.  Maybe we might even replace the pte argument with the
  pte_t?

Ben Herrenschmidt would also like the pte pointer for PowerPC:

  Passing the ptep in there is exactly what I want.  I want that
  -instead- of the PTE value, because I have issue on some ppc cases,
  for I$/D$ coherency, where set_pte_at() may decide to mask out the
  _PAGE_EXEC.

So, pass in the mapped page table pointer into update_mmu_cache(), and
remove the PTE value, updating all implementations and call sites to
suit.

Includes a fix from Stephen Rothwell:

  sparc: fix fallout from update_mmu_cache API change

  Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-02-20 16:41:46 +00:00
Thomas Gleixner
b7e56edba4 Merge branch 'linus' into x86/mm
x86/mm is on 32-rc4 and missing the spinlock namespace changes which
are needed for further commits into this topic.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2010-02-17 18:28:05 +01:00
David Daney
5b7efa898b MIPS: Don't probe reserved EntryHi bits.
The patch that adds cpu_probe_vmbits is erroneously writing to reserved
bit 12.  Since we are really only probing high bits, don't write this bit
with a one.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Cc: Guenter Roeck <guenter.roeck@ericsson.com>
Patchwork: http://patchwork.linux-mips.org/patch/949/
Acked-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10 22:15:46 +01:00
Julia Lawall
c2d5b5e525 MIPS: SNI: Correct NULL test
Test the value that was just allocated rather than the previously tested one.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@r@
expression *x;
expression e;
identifier l;
@@

if (x == NULL || ...) {
    ... when forall
    return ...; }
... when != goto l;
    when != x = e
    when != &x
*x == NULL
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
To: kernel-janitors@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/945/
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10 22:15:45 +01:00
David Daney
63731c964d MIPS: Fix __devinit __cpuinit confusion in cpu_cache_init
cpu_cache_init and the things it calls should all be __cpuinit instead
of __devinit.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10 22:15:45 +01:00
Ralf Baechle
59d302b342 MIPS: IP27: Make defconfig useful again.
RTC support was rewritten but the defconfig files were not updated.  Enable
IPv6 support which for some folks already is a must have.  Assign useful
values to other new options.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10 22:15:43 +01:00
Wu Zhangjin
f4fc580bec MIPS: Fixup of the r4k timer
As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
timer interrupts with > 64 external IRQs" have broken the r4k timer
since it didn't initialize the cp0_compare_irq_shift variable used in
c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
false.

This patch fixes it via initializing the cp0_compare_irq_shift as the
cp0_compare_irq used in the old c0_compare_int_pending().

Reported-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: David VomLehn <dvomlehn@cisco.com>
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/922/
Tested-by: Shane McDonald <mcdonald.shane@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-10 22:15:42 +01:00
Linus Torvalds
e770a0f115 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: 64-bit: Detect virtual memory size
  MIPS: AR7: Fix USB slave mem range typo
  MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
2010-02-02 12:45:33 -08:00
Guenter Roeck
91dfc423cc MIPS: 64-bit: Detect virtual memory size
Linux kernel 2.6.32 and later allocate address space from the top of the
kernel virtual memory address space.

This patch implements virtual memory size detection for 64 bit MIPS CPUs
to avoid resulting crashes.

Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/935/
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-02 19:56:23 +01:00
Tejun Heo
ab386128f2 Merge branch 'master' into percpu 2010-02-02 14:38:15 +09:00
Wu Fengguang
61ef2489db resources: introduce generic page_is_ram()
It's based on walk_system_ram_range(), for archs that don't have
their own page_is_ram().

The static verions in MIPS and SCORE are also made global.

v4: prefer plain 1 instead of PAGE_IS_RAM (H. Peter Anvin)
v3: add comment (KAMEZAWA Hiroyuki)
    "AFAIK, this "System RAM" information has been used for kdump to
    grab valid memory area and seems good for the kernel itself."
v2: add PAGE_IS_RAM macro (Américo Wang)

Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Cc: Américo Wang <xiyou.wangcong@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Yinghai Lu <yinghai@kernel.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Reviewed-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Signed-off-by: Wu Fengguang <fengguang.wu@intel.com>
LKML-Reference: <20100122081619.GA6431@localhost>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-02-01 16:58:17 -08:00
Alexander Clouter
ba284b1f19 MIPS: AR7: Fix USB slave mem range typo
Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/919/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01 20:30:25 +01:00
Manuel Lauss
22f4bb68b3 MIPS: Alchemy: Fix dbdma ring destruction memory debugcheck.
DBDMA descriptors need to be located at 32-byte aligned addresses;
however kmalloc in conjunction with the SLAB allocator and
CONFIG_DEBUG_SLUB enabled doesn't deliver any.  The dbdma code works
around that by allocating a larger area and realigning the start
address within it.

When freeing a channel however this adjustment is not taken into
account which results in an oops:

Kernel bug detected[#1]:
[...]
Call Trace:
[<80186010>] cache_free_debugcheck+0x284/0x318
[<801869d8>] kfree+0xe8/0x2a0
[<8010b31c>] au1xxx_dbdma_chan_free+0x2c/0x7c
[<80388dc8>] au1x_pcm_dbdma_free+0x34/0x4c
[<80388fa8>] au1xpsc_pcm_close+0x28/0x38
[<80383cb8>] soc_codec_close+0x14c/0x1cc
[<8036dbb4>] snd_pcm_release_substream+0x60/0xac
[<8036dc40>] snd_pcm_release+0x40/0xa0
[<8018c7a8>] __fput+0x11c/0x228
[<80188f60>] filp_close+0x7c/0x98
[<80189018>] sys_close+0x9c/0xe4
[<801022a0>] stack_done+0x20/0x3c

Fix this by recording the address delivered by kmalloc() and using
it as parameter to kfree().

This fix is only necessary with the SLAB allocator and CONFIG_DEBUG_SLAB
enabled;  non-debug SLAB, SLUB do return nicely aligned addresses,
debug-enabled SLUB currently panics early in the boot process.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/878/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-01 20:30:25 +01:00
David VomLehn
010c108d7a MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs
The MIPS processor is limited to 64 external interrupt sources. Using a
greater number without IRQ sharing requires reading platform-specific
registers. On such platforms, reading the IntCtl register to determine
which interrupt corresponds to a timer interrupt will not work.

On MIPSR2 systems there is a solution - the TI bit in the Cause register,
specifically indicates that a timer interrupt has occured. This patch uses
that bit to detect interrupts for MIPSR2 processors, which may be expected
to work regardless of how the timer interrupt may be routed in the hardware.

Signed-off-by: David VomLehn (dvomlehn@cisco.com)
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/804/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28 00:03:31 +01:00
David VomLehn
59dfa2fcae MIPS: PowerTV: Streamline access to platform device registers
Pre-compute addresses for the basic ASIC registers. This speeds up access
and allows memory for unused configurations to be freed. In addition,
uninitialized register addresses will be returned as NULL to catch bad
usage quickly.

Signed-off-by: David VomLehn <dvomlehn@cisco.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28 00:03:31 +01:00
Alexander Clouter
9c4a6fce20 MIPS: Fix vmlinuz build for 32bit-only math shells
POSIX requires $((<expression>)) arithmetic in sh only to have long
arithmetic so on 32-bit sh binaries might do only 32-bit arithmetic but
the arithmetic done in arch/mips/boot/compressed/Makefile needs 64-bit.

I play with the AR7 platform, so VMLINUX_LOAD_ADDRESS is
0xffffffff94100000, and for an example 4MiB kernel
VMLINUZ_LOAD_ADDRESS is made out to be:
----
alex@berk:~$ bash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))'
ffffffff94500000
alex@berk:~$ dash -c 'printf "%x\n" $((0xffffffff94100000 + 0x400000))'
80000000003fffff
----

The former is obviously correct whilst the later breaks things royally.

Fortunately working with only the lower 32bit's works for both bash and
dash:
----
$ bash -c 'printf "%x\n" $((0x94100000 + 0x400000))'
94500000
$ dash -c 'printf "%x\n" $((0x94100000 + 0x400000))'
94500000
----

So, we can split the original 64bit string to two parts, and only
calculate the low 32bit part, which is big enough (1GiB kernel sizes
anyone?) for a normal Linux kernel image file, now, we calculate the
VMLINUZ_LOAD_ADDRESS like this:

1. if present, append top 32bit of VMLINUX_LOAD_ADDRESS" as a prefix
2. get the sum of the low 32bit of VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE

This patch fixes vmlinuz kernel builds on systems where only a
32bit-only math shell is available.

Patch Changelog:
  Version 2
    - simplified method by using 'expr' for 'substr' and making it work
	with dash once again
  Version 1
    - Revert the removals of '-n "$(VMLINUX_SIZE)"' to avoid the error
        of "make clean"
    - Consider more cases of the VMLINUX_LOAD_ADDRESS
  Version 0
    - initial release

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Acked-by: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/861/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28 00:03:30 +01:00
Wu Zhangjin
fe1d45e086 MIPS: Add support of LZO-compressed kernels
The necessary changes to the x86 Kconfig and boot/compressed to allow the
use of this new compression method.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Patchwork: http://patchwork.linux-mips.org/patch/857/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-28 00:03:30 +01:00
Yoichi Yuasa
9a3065c942 MIPS: Ignore vmlinux.*
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/795/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:38 +01:00
Yoichi Yuasa
17f964e881 MIPS: Move vmlinux.ecoff to arch/mips/boot
It moves to the same directory as the boot files in other formats.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/796/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:38 +01:00
Anton Blanchard
d797396f33 MIPS: cpumask_of_node() should handle -1 as a node
pcibus_to_node can return -1 if we cannot determine which node a pci bus
is on. If passed -1, cpumask_of_node will negatively index the lookup array
and pull in random data:

# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
00000000,00000003,00000000,00000000
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
64-65

Change cpumask_of_node to check for -1 and return cpu_all_mask in this
case:

# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpus
ffffffff,ffffffff,ffffffff,ffffffff
# cat /sys/devices/pci0000:00/0000:00:01.0/local_cpulist
0-127

Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Andrew Morton <akpm@linux-foundation.org>
Patchwork: http://patchwork.linux-mips.org/patch/831/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:37 +01:00
David Daney
0e8a1d8262 MIPS: Octeon: Use non-overflowing arithmetic in sched_clock
With typical mult and shift values, the calculation for Octeon's sched_clock
overflows when using 64-bit arithmetic.  Use 128-bit calculations instead.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/849/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:36 +01:00
Yoichi Yuasa
9b54dc5869 MIPS: Malta, PowerTV: Remove unnecessary "Linux started"
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/813/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:36 +01:00
Yoichi Yuasa
0622870a64 MIPS: BCM63xx: Remove duplicate CONFIG_CMDLINE.
Builtin cmdline is copied by arch_mem_init().

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/812/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:36 +01:00
Yoichi Yuasa
70b5c8194f MIPS: AR7: Remove unused prom_getchar()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/811/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:36 +01:00
David VomLehn
1dc238632b MIPS: PowerTV: Remove extra r4k_clockevent_init() call
A call to r4k_clocksource_init() was added to plat_time_init(), but
when init_mips_clock_source() calls the same function, boot fails in
clockevents_register_device(). This patch removes the extraneous call.

Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Patchwork: http://patchwork.linux-mips.org/patch/803/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:35 +01:00
Yoichi Yuasa
0833c76bd8 MIPS: Cobalt use strlcat() for the command line arguments
Tested with CoLo v1.22

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/807/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:34 +01:00
David Daney
c6a3c851a2 MIPS: Octeon: Add sched_clock() to csrc-octeon.c
With the advent of function graph tracing on MIPS, Octeon needs a high
precision sched_clock() implementation.  Without it, most timing
numbers are reported as 0.000.

This new sched_clock just uses the 64-bit cycle counter appropriately
scaled.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/805/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:34 +01:00
Atsushi Nemoto
98bea6fc87 MIPS: TXx9: Cleanup builtin-cmdline processing
Since commit 898d357b5262f9e26bc2418e01f8676e80d9867e (lmo) /
6acc7d485c (kernel.org) ("Fix and enhance
built-in kernel command line") arcs_cmdline[] does not contain built-in
command line.  The commit introduce CONFIG_CMDLINE_BOOL and
CONFIG_CMDLINE_OVERRIDE to control built-in command line, and now we can
use them instead of platform-specific built-in command line processing.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Patchwork: http://patchwork.linux-mips.org/patch/802/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:34 +01:00
Yoichi Yuasa
7e326d687d MIPS: PowerTV: simplify prom_init_cmdline() and merge into prom_init()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/801/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:33 +01:00
Yoichi Yuasa
0eb99a9354 MIPS: PowerTV: Remove unused platform_die()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/800/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:33 +01:00
Yoichi Yuasa
2620c3570f MIPS: PowerTV: Remove mips_machine_halt()
mips_machine_halt() is same as mips_machine_restart().  Also delete the
registration of _machine_halt and pm_power_off because mips_machine_halt()
is the restart function.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/798/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:32 +01:00
Yoichi Yuasa
09b7c9f24d MIPS: PowerTV: Remove unused ptv_memsize
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/799/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:32 +01:00
Yoichi Yuasa
99d2b173e5 MIPS: PowerTV: Remove unused prom_getcmdline()
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/797/
Reviewed-by: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:31 +01:00
Yoichi Yuasa
57699407fa MIPS: AR7: Remove kgdb_enabled
An unused leftover from the old KGDB implementation.

Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/794/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:31 +01:00
Julia Lawall
42ecda1ae8 MIPS: Alchemy: Correct code taking the size of a pointer
sizeof(dp) is just the size of the pointer.  Change it to the size of the
referenced structure.

A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression *x;
expression f;
type T;
@@

*f(...,(T)x,...)
// </smpl>

Signed-off-by: Julia Lawall <julia@diku.dk>
Patchwork: http://patchwork.linux-mips.org/patch/789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:31 +01:00
Florian Fainelli
05c694681e MIPS: BCM63xx: Fix whitespace damaged board_bcm963xx.c
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:30 +01:00
Yoichi Yuasa
66a0f0f2a2 MIPS: VR41xx: Use strlcat() for the command line arguments
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/784/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:30 +01:00
Wu Zhangjin
d4d9a553d7 MIPS: Cleanup and Fixup of compressed kernel support
o Remove the .initrd section.  The initrd section was already handled
   when vmlinux was linked.
 o Discard .MIPS.options, .options, .pdr, .reginfo, .comment and .note
   sections.  If .MIPS.options is not removed, kernels compiled with gcc
   3.4.6 will not boot.
 o Clean up the file format.
 o Remove several other unneeded sections.

Tested with GCC 3.4.6 and 4.4.1 with and without initrd.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/785/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:29 +01:00
David Daney
abbdc3d88a MIPS: Cleanup forgotten label_module_alloc in tlbex.c
commit c8af165342e83a4eb078c9607d29a7c399d30a53 (lmo) rsp.
e0cc87f594 (kernel.org) left
label_module_alloc unused.  Remove it now.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/752/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-01-12 18:19:29 +01:00
Andreas Fenkart
4b529401c5 mm: make totalhigh_pages unsigned long
Makes it consistent with the extern declaration, used when CONFIG_HIGHMEM
is set Removes redundant casts in printout messages

Signed-off-by: Andreas Fenkart <andreas.fenkart@streamunlimited.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Chen Liqin <liqin.chen@sunplusct.com>
Cc: Lennox Wu <lennox.wu@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-01-11 09:34:03 -08:00
Christoph Lameter
38b7827fcd local_t: Remove cpu_local_xx macros
These macros have not been used for awhile now.

Signed-off-by: Christoph Lameter <cl@linux-foundation.org>
Signed-off-by: Tejun Heo <tj@kernel.org>
2010-01-05 15:34:49 +09:00
Linus Torvalds
dbfc985195 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (71 commits)
  MIPS: Lasat: Fix botched changes to sysctl code.
  RTC: rtc-cmos.c: Fix warning on MIPS
  MIPS: Cleanup random differences beween lmo and Linus' kernel.
  MIPS: No longer hardwire CONFIG_EMBEDDED to y
  MIPS: Fix and enhance built-in kernel command line
  MIPS: eXcite: Remove platform.
  MIPS: Loongson: Cleanups of serial port support
  MIPS: Lemote 2F: Suspend CS5536 MFGPT Timer
  MIPS: Excite: move iodev_remove to .devexit.text
  MIPS: Lasat: Convert to proc_fops / seq_file
  MIPS: Cleanup signal code initialization
  MIPS: Modularize COP2 handling
  MIPS: Move EARLY_PRINTK to Kconfig.debug
  MIPS: Yeeloong 2F: Cleanup reset logic using the new ec_write function
  MIPS: Yeeloong 2F: Add LID open event as the wakeup event
  MIPS: Yeeloong 2F: Add basic EC operations
  MIPS: Move several variables from .bss to .init.data
  MIPS: Tracing: Make function graph tracer work with -mmcount-ra-address
  MIPS: Tracing: Reserve $12(t0) for mcount-ra-address of gcc 4.5
  MIPS: Tracing: Make ftrace for MIPS work without -fno-omit-frame-pointer
  ...
2009-12-17 16:38:06 -08:00
Linus Torvalds
b8a7f3cd7e Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6:
  kill I_LOCK
  fold do_sync_file_range into sys_sync_file_range
  fix up O_SYNC comments
  VFS/fsstack: handle 32-bit smp + preempt + large files in fsstack_copy_inode_size
  fsstack/ecryptfs: remove unused get_nlinks param to fsstack_copy_attr_all
  vfs: remove extraneous NULL d_inode check from do_filp_open
  fs: no games with DCACHE_UNHASHED
  fs: anon_inodes implement dname
  dio: fix use-after-free
2009-12-17 08:31:01 -08:00
Christoph Hellwig
76b7e0058d fix up O_SYNC comments
Proper Posix O_SYNC handling only made it into 2.6.33, not 2.6.32.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2009-12-17 11:03:24 -05:00
Linus Torvalds
5a865c0606 Merge branch 'for-33' of git://repo.or.cz/linux-kbuild
* 'for-33' of git://repo.or.cz/linux-kbuild: (29 commits)
  net: fix for utsrelease.h moving to generated
  gen_init_cpio: fixed fwrite warning
  kbuild: fix make clean after mismerge
  kbuild: generate modules.builtin
  genksyms: properly consider  EXPORT_UNUSED_SYMBOL{,_GPL}()
  score: add asm/asm-offsets.h wrapper
  unifdef: update to upstream revision 1.190
  kbuild: specify absolute paths for cscope
  kbuild: create include/generated in silentoldconfig
  scripts/package: deb-pkg: use fakeroot if available
  scripts/package: add KBUILD_PKG_ROOTCMD variable
  scripts/package: tar-pkg: use tar --owner=root
  Kbuild: clean up marker
  net: add net_tstamp.h to headers_install
  kbuild: move utsrelease.h to include/generated
  kbuild: move autoconf.h to include/generated
  drop explicit include of autoconf.h
  kbuild: move compile.h to include/generated
  kbuild: drop include/asm
  kbuild: do not check for include/asm-$ARCH
  ...

Fixed non-conflicting clean merge of modpost.c as per comments from
Stephen Rothwell (modpost.c had grown an include of linux/autoconf.h
that needed to be changed to generated/autoconf.h)
2009-12-17 07:23:42 -08:00
Ralf Baechle
606d62fa02 MIPS: Lasat: Fix botched changes to sysctl code.
Commit 1639319222 "sysctl mips/lasat: Remove
dead binary sysctl support" obviously wasn't test built ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:37 +00:00
Ralf Baechle
cf72e9470d MIPS: Cleanup random differences beween lmo and Linus' kernel.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:36 +00:00
Martin Michlmayr
a4609780c9 MIPS: No longer hardwire CONFIG_EMBEDDED to y
There's no reason for MIPS to select EMBEDDED.  In fact, EMBEDDED makes
MIPS more awkward to deal with because it makes it different to the
majority of architectures for no good reason.

[Ralf: Historically disabling EMBEDDED had hid essential options for many
 MIPS platforms such as serial console and forced crap like VGA support
 or power managment enabled for platforms where those don't make any sense.

 The name of the option is also _very_ missleading so many users don't
 select it even where is was required for a functioning kernel.]

Signed-off-by: Martin Michlmayr <tbm@cyrius.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/663/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:36 +00:00
Dmitri Vorobiev
6acc7d485c MIPS: Fix and enhance built-in kernel command line
Currently, MIPS kernels silently overwrite kernel command-line parameters
hardcoded in CONFIG_CMDLINE by the ones received from firmware.  Therefore,
using firmware remains the only reliable method to transfer the
command-line parameters, which is not always desirable or convenient, and
the CONFIG_CMDLINE option is thereby effectively rendered useless.

This patch fixes the problem described above and introduces a more flexible
scheme of handling the kernel command line, in a manner identical to what is
currently used for x86.  The default behavior, i.e. when CONFIG_CMDLINE_BOOL
is not defined, retains the existing semantics, and firmware command-line
arguments override the hardcoded ones.

[Ralf: I fixed up all the defconfig files so the stay unaffected by this
change.]

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/689/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:35 +00:00
Ralf Baechle
de4148f3ef MIPS: eXcite: Remove platform.
The platform has never been fully merged 

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
2009-12-17 01:57:35 +00:00
Wu Zhangjin
c3d8d85019 MIPS: Loongson: Cleanups of serial port support
This patchs uses a loongson_uart_base variable instead of the
uart_base[] array and adds a new kernel option to avoid to compile
uart_base.c all the time, which will save a little bit of memory for us.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
http://patchwork.linux-mips.org/patch/727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:34 +00:00
Wu Zhangjin
c47a48d83a MIPS: Lemote 2F: Suspend CS5536 MFGPT Timer
Before putting the Loongson 2F into wait mode, suspend the MFGPT Timer and
after wake-up resume it.  This may save some power.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/706/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:33 +00:00
Uwe Kleine-König
59d4a91416 MIPS: Excite: move iodev_remove to .devexit.text
The function iodev_remove is used only wrapped by __devexit_p so define
it using __devexit.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/710/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:33 +00:00
Alexey Dobriyan
c0b4abdd52 MIPS: Lasat: Convert to proc_fops / seq_file
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Cc: akpm@linux-foundation.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/725/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:33 +00:00
Ralf Baechle
137f6f3e28 MIPS: Cleanup signal code initialization
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/709/
2009-12-17 01:57:32 +00:00
Ralf Baechle
69f3a7de1f MIPS: Modularize COP2 handling
Away with the daemons of ifdef; get ready for future COP2 users.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/708/
2009-12-17 01:57:30 +00:00
Ralf Baechle
4dd92e15b3 MIPS: Move EARLY_PRINTK to Kconfig.debug
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:30 +00:00
Wu Zhangjin
70ab711df4 MIPS: Yeeloong 2F: Cleanup reset logic using the new ec_write function
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/683/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:29 +00:00
Wu Zhangjin
cb1ed9e117 MIPS: Yeeloong 2F: Add LID open event as the wakeup event
Yeeloong 2F netbook has an KB3310B embedded controller to manage the LID
action.  When the LID is closed or opened a SCI interrupt is sent out and
the corresponding event is saved to an EC register for later query.

Allow the LID open interrupt to wake the processor from wait mode if it is
in the suspend mode.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/685/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:28 +00:00
Wu Zhangjin
ec614d80b5 MIPS: Yeeloong 2F: Add basic EC operations
YeeLoong2F has a KB3310b embedded controller. Add basic operations for
future related drivers and board support.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/684/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:27 +00:00
Dmitri Vorobiev
599a89459f MIPS: Move several variables from .bss to .init.data
Several static uninitialized variables are used in the scope of __init
functions but are themselves not marked as __initdata.  This patch is to put
those variables to where they belong and to reduce the memory footprint a
little bit.

Also, a couple of lines with spaces instead of tabs were fixed.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/698/
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:27 +00:00
Wu Zhangjin
7326c4e567 MIPS: Tracing: Make function graph tracer work with -mmcount-ra-address
That thread "MIPS: Add option to pass return address location to
_mcount" from "David Daney <ddaney@caviumnetworks.com>" have added a new
option -mmcount-ra-address to gcc(4.5) for MIPS to transfer the location
of the return address to _mcount.

Benefit from this new feature, function graph tracer on MIPS will be
easier and safer to hijack the return address of the kernel function,
which will save some overhead and make the whole thing more reliable.

In this patch, at first, try to enable the option -mmcount-ra-address in
arch/mips/Makefile with cc-option, if gcc support it, it will be
enabled, otherwise, no side effect.

and then, we need to support this new option of gcc 4.5 and also support
the old gcc versions.

with _mcount in the old gcc versions, it's not easy to get the location
of return address(tracing: add function graph tracer support for MIPS),
   so, we do it in a C function: ftrace_get_parent_addr(ftrace.c), but
   with -mmcount-ra-address, only several instructions need to get what
   we want, so, I put into asm(mcount.S). and also, as the $12(t0) is
   used by -mmcount-ra-address for transferring the localtion of return
   address to _mcount, we need to save it into the stack and restore it
   when enabled dynamic function tracer, 'Cause we have called
   "ftrace_call" before "ftrace_graph_caller", which may destroy
   $12(t0).

(Thanks to David for providing that -mcount-ra-address and giving the
 idea of KBUILD_MCOUNT_RA_ADDRESS, both of them have made the whole
 thing more beautiful!)

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/681/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:27 +00:00
Wu Zhangjin
fc49a3be2b MIPS: Tracing: Reserve $12(t0) for mcount-ra-address of gcc 4.5
A new option -mmcount-ra-address for gcc 4.5 have been sent by David
Daney <ddaney@caviumnetworks.com> in the thread "MIPS: Add option to
pass return address location to _mcount", which help to record the
location of the return address(ra) for the function graph tracer of MIPS
to hijack the return address easier and safer. that option used the
$12(t0) register by default, so, we reserve it for it, and use t1,t2,t3
instead of t0,t1,t2.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/680/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:26 +00:00
Wu Zhangjin
046199cae7 MIPS: Tracing: Make ftrace for MIPS work without -fno-omit-frame-pointer
When remove the -fno-omit-frame-pointer, gcc will not save the frame
pointer for us, we need to save one ourselves.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/679/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:25 +00:00
Wu Zhangjin
e17ff5fec6 MIPS: Tracing: Add dynamic function graph tracer for MIPS
This patch make function graph tracer work with dynamic function tracer.

To share the source code of dynamic function tracer(MCOUNT_SAVE_REGS),
and avoid restoring the whole saved registers, we need to restore the ra
register from the stack.

(NOTE: This not work with 32bit! need to ensure why!)

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/678/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:25 +00:00
Wu Zhangjin
29c5d3462f MIPS: Tracing: Add function graph tracer support for MIPS
The implementation of function graph tracer for MIPS is a little
different from X86.

in MIPS, gcc(with -pg) only transfer the caller's return address(at) and
the _mcount's return address(ra) to us.

For the kernel part without -mlong-calls:

move at, ra
jal _mcount

For the module part with -mlong-calls:

lui v1, hi16bit_of_mcount
addiu v1, v1, low16bit_of_mcount
move at, ra
jal _mcount

Without -mlong-calls,

if the function is a leaf, it will not save the return address(ra):

ffffffff80101298 <au1k_wait>:
ffffffff80101298:       67bdfff0        daddiu  sp,sp,-16
ffffffff8010129c:       ffbe0008        sd      s8,8(sp)
ffffffff801012a0:       03a0f02d        move    s8,sp
ffffffff801012a4:       03e0082d        move    at,ra
ffffffff801012a8:       0c042930        jal     ffffffff8010a4c0 <_mcount>
ffffffff801012ac:       00020021        nop

so, we can hijack it directly in _mcount, but if the function is non-leaf, the
return address is saved in the stack.

ffffffff80133030 <copy_process>:
ffffffff80133030:       67bdff50        daddiu  sp,sp,-176
ffffffff80133034:       ffbe00a0        sd      s8,160(sp)
ffffffff80133038:       03a0f02d        move    s8,sp
ffffffff8013303c:       ffbf00a8        sd      ra,168(sp)
ffffffff80133040:       ffb70098        sd      s7,152(sp)
ffffffff80133044:       ffb60090        sd      s6,144(sp)
ffffffff80133048:       ffb50088        sd      s5,136(sp)
ffffffff8013304c:       ffb40080        sd      s4,128(sp)
ffffffff80133050:       ffb30078        sd      s3,120(sp)
ffffffff80133054:       ffb20070        sd      s2,112(sp)
ffffffff80133058:       ffb10068        sd      s1,104(sp)
ffffffff8013305c:       ffb00060        sd      s0,96(sp)
ffffffff80133060:       03e0082d        move    at,ra
ffffffff80133064:       0c042930        jal     ffffffff8010a4c0 <_mcount>
ffffffff80133068:       00020021        nop

but we can not get the exact stack address(which saved ra) directly in
_mcount, we need to search the content of at register in the stack space
or search the "s{d,w} ra, offset(sp)" instruction in the text. 'Cause we
can not prove there is only a match in the stack space, so, we search
the text instead.

as we can see, if the first instruction above "move at, ra" is not a
store instruction, there should be a leaf function, so we hijack the at
register directly via putting &return_to_handler into it, otherwise, we
search the "s{d,w} ra, offset(sp)" instruction to get the stack offset,
and then the stack address. we use the above copy_process() as an
example, we at last find "ffbf00a8", 0xa8 is the stack offset, we plus
it with s8(fp), that is the stack address, we hijack the content via
writing the &return_to_handler in.

If with -mlong-calls, since there are two more instructions above "move
at, ra", so, we can move the pointer to the position above "lui v1,
hi16bit_of_mcount".

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/677/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:25 +00:00
Wu Zhangjin
8f99a16265 MIPS: Tracing: Add IRQENTRY_EXIT section for MIPS
This patch add a new section for MIPS to record the block of the hardirq
handling for function graph tracer(print_graph_irq) via adding the
__irq_entry annotation to the the entrypoints of the hardirqs(the block
with irq_enter()...irq_exit()).

Thanks goes to Steven & Frederic Weisbecker for their feedbacks.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Reviewed-by: Frederic Weisbecker <fweisbec@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/676/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:24 +00:00
Wu Zhangjin
538f19526e MIPS: Tracing: Add dynamic function tracer support
With dynamic function tracer, by default, _mcount is defined as an
"empty" function, it returns directly without any more action . When
enabling it in user-space, it will jump to a real tracing
function(ftrace_caller), and do the real job for us.

Differ from the static function tracer, dynamic function tracer provides
two functions ftrace_make_call()/ftrace_make_nop() to enable/disable the
tracing of some indicated kernel functions(set_ftrace_filter).

In the -v4 version, the implementation of this support is basically the same as
X86 version does: _mcount is implemented as an empty function and ftrace_caller
is implemented as a real tracing function respectively.

But in this version, to support module tracing with the help of
-mlong-calls in arch/mips/Makefile:

MODFLAGS += -mlong-calls.

The stuff becomes a little more complex. We need to cope with two
different type of calling to _mcount.

For the kernel part, the calling to _mcount(result of "objdump -hdr
vmlinux"). is like this:

	108:   03e0082d        move    at,ra
	10c:   0c000000        jal     0 <fpcsr_pending>
                        10c: R_MIPS_26  _mcount
                        10c: R_MIPS_NONE        *ABS*
                        10c: R_MIPS_NONE        *ABS*
	110:   00020021        nop

For the module with -mlong-calls, it looks like this:

	c:	3c030000 	lui	v1,0x0
			c: R_MIPS_HI16	_mcount
			c: R_MIPS_NONE	*ABS*
			c: R_MIPS_NONE	*ABS*
	10:	64630000 	daddiu	v1,v1,0
			10: R_MIPS_LO16	_mcount
			10: R_MIPS_NONE	*ABS*
			10: R_MIPS_NONE	*ABS*
	14:	03e0082d 	move	at,ra
	18:	0060f809 	jalr	v1

In the kernel version, there is only one "_mcount" string for every
kernel function, so, we just need to match this one in mcount_regex of
scripts/recordmcount.pl, but in the module version, we need to choose
one of the two to match. Herein, I choose the first one with
"R_MIPS_HI16 _mcount".

and In the kernel verion, without module tracing support, we just need
to replace "jal _mcount" by "jal ftrace_caller" to do real tracing, and
filter the tracing of some kernel functions via replacing it by a nop
instruction.

but as we have described before, the instruction "jal ftrace_caller" only left
32bit length for the address of ftrace_caller, it will fail when calling from
the module space. so, herein, we must replace something else.

the basic idea is loading the address of ftrace_caller to v1 via changing these
two instructions:

	lui	v1,0x0
	addiu	v1,v1,0

If we want to enable the tracing, we need to replace the above instructions to:

	lui	v1, HI_16BIT_ftrace_caller
	addiu	v1, v1, LOW_16BIT_ftrace_caller

If we want to stop the tracing of the indicated kernel functions, we
just need to replace the "jalr v1" to a nop instruction. but we need to
replace two instructions and encode the above two instructions
oursevles.

Is there a simpler solution? Yes! Here it is, in this version, we put _mcount
and ftrace_caller together, which means the address of _mcount and
ftrace_caller is the same:

_mcount:
ftrace_caller:
	j	ftrace_stub
	 nop

	...(do real tracing here)...

ftrace_stub:
	jr	ra
	 move	ra, at

By default, the kernel functions call _mcount, and then jump to ftrace_stub and
return. and when we want to do real tracing, we just need to remove that "j
ftrace_stub", and it will run through the two "nop" instructions and then do
the real tracing job.

what about filtering job? we just need to do this:

	 lui v1, hi_16bit_of_mcount        <--> b 1f (0x10000004)
	 addiu v1, v1, low_16bit_of_mcount
	 move at, ra
	 jalr v1
	 nop
	 				     1f: (rec->ip + 12)

In linux-mips64, there will be some local symbols, whose name are
prefixed by $L, which need to be filtered. thanks goes to Steven for
writing the mips64-specific function_regex.

In a conclusion, with RISC, things becomes easier with such a "stupid"
trick, RISC is something like K.I.S.S, and also, there are lots of
"simple" tricks in the whole ftrace support, thanks goes to Steven and
the other folks for providing such a wonderful tracing framework!

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/675/
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:23 +00:00
Wu Zhangjin
69a7d1b3ec MIPS: Tracing: Enable HAVE_FUNCTION_TRACE_MCOUNT_TEST for MIPS
There is an exisiting common ftrace_test_stop_func() in
kernel/trace/ftrace.c, which is used to check the global variable
ftrace_trace_stop to determine whether stop the function tracing.

This patch implepment the MIPS specific one to speedup the procedure.

Thanks goes to Zhang Le for Cleaning it up.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/673/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:22 +00:00
Wu Zhangjin
d2bb076299 MIPS: Tracing: Add static function tracer support for MIPS
If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
_mcount will be inserted into each kernel function. so, there is a
possibility to trace the kernel functions in _mcount.

This patch add the MIPS specific _mcount support for static function
tracing. by default, ftrace_trace_function is initialized as
ftrace_stub(an empty function), so, the default _mcount will introduce
very little overhead. after enabling ftrace in user-space, it will jump
to a real tracing function and do static function tracing for us.

and -ffunction-sections is incompatible with -pg, so, disable it when
ftracer is enabled.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Reviewed-by: Steven Rostedt <rostedt@goodmis.org>
Cc: Nicholas Mc Guire <der.herr@hofr.at>
Cc: zhangfx@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:21 +00:00
Thomas Gleixner
8922f79ee5 MIPS: Fixup last users of irq_chip->typename
The typename member of struct irq_chip was kept for migration purposes
and is obsolete since more than 2 years. Fix up the leftovers.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
To: LKML <linux-kernel@vger.kernel.org>
Cc: Ingo Molnar <mingo@elte.hu>
Patchwork: http://patchwork.linux-mips.org/patch/661/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:21 +00:00
Wu Zhangjin
f8ede0f700 MIPS: Loongson 2F: Add CPU frequency scaling support
Loongson 2F supports CPU clock scaling. When put it into wait mode by
setting the frequency as ZERO it will stay in this mode until an external
interrupt wakes the CPU again.

To enable clock scaling support, an external timer of a known stable rate
is required.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/660/
Patchwork: http://patchwork.linux-mips.org/patch/751/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:20 +00:00
Wu Zhangjin
9726b43a4d MIPS: Add basic CPUFreq options.
This patch adds basic options for MIPS CPUFreq support.

Since the cp0 timer's frequency is based on the processor clockrate it can
not be used with CPUFReq; an additional external timer is required.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/659/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:20 +00:00
Wu Zhangjin
916daba8a9 MIPS: Lemote 2F: Add cs5536 MFGPT timer support
CPUFreq support for Loongson 2F requires an external timer.

Because the frequency of the MIPS Timer is related to the CPU frequency
which itself is variable another timer of constant frequency is required.

Export the mfgpt0 counter disable / enable operations for the coming
suspend support to suspend / resume the timer.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cpufreq@vger.kernel.org,
Cc: Dave Jones <davej@redhat.com>,
Cc: Dominik Brodowski <linux@dominikbrodowski.net>,
Cc: yanh@lemote.com
Cc: huhb@lemote.com,
Patchwork: http://patchwork.linux-mips.org/patch/658/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:19 +00:00
Wu Zhangjin
6e552c9b3a MIPS: Lemote 2F: Add Lynloong support
Add a new machtype and kernel options for the Lynloong.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/657/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:18 +00:00
Wu Zhangjin
e13fb77661 MIPS: Lemote 2F: Add NAS support
Kernel support for this machine is almost the same as Fuloong 2F; the only
difference is that it uses the serial port provided by Loongson 2F processor
as Yeeloong 2F does.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/656/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:18 +00:00
David VomLehn
a3a0f8c8ed MIPS: PowerTV: Base files for Cisco PowerTV platform
Add the Cisco Powertv cable settop box to the MIPS tree. This platform is
based on a MIPS 24Kc processor with various devices integrated on the same
ASIC. There are multiple models of this box, with differing configuration
but the same kernel runs across the product line.

Signed-off-by: David VomLehn <dvomlehn@cisco.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/132/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:17 +00:00
Akinobu Mita
13e79b4622 MIPS: Sibyte: Use hweight8 instead of counting bits
Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/637/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:16 +00:00
Wu Zhangjin
a9e8641f4c MIPS: Yeeloong 2F: Add board specific suspend support
Lemote Loongson 2F family machines need an external interrupt to wake the
system from the suspend mode.

For YeeLoong 2F and Mengloong 2F setup the keyboard interrupt as the wakeup
interrupt.

The new Fuloong 2F and LingLoong 2F have a button to directly send an
interrupt to the CPU so there is no need to setup an interrupt.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linux-pm@lists.linux-foundation.org
Patchwork: http://patchwork.linux-mips.org/patch/630/
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:16 +00:00
Wu Zhangjin
f181bf60e3 MIPS: Loongson 2F: Add suspend support framework
This patch add basic suspend support for loongson2f family machines,
loongson2f have a specific feature: when we set it's frequency to ZERO,
it will go into a wait mode, and then can be waked up by the external
interrupt. so, if we setup suitable interrupts before putting it into
wait mode, we will be able wake it up whenever we want via sending the
relative interrupts to it.

These interrupts are board-specific, Yeeloong2F use the keyboard
interrupt and SCI interrupt, but LingLoong and Fuloong2F use the
interrupts connected to the processors directly. and BTW: some old
LingLoong and FuLoong2F have no such interrupts connected, so, there is
no way to wake them up from suspend mode. and therefore, please do not
enable the kernel support for them.

The board-specific support will be added in the coming patches.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: linux-pm@lists.linux-foundation.org
Patchwork: http://patchwork.linux-mips.org/patch/629/
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:16 +00:00
Wu Zhangjin
22f1fdfd62 MIPS: Add support for uncached accelerated mappings.
Loongson2f support video acceleration.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/624/
Patchwork: http://patchwork.linux-mips.org/patch/625/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:15 +00:00
Wu Zhangjin
55045ff555 MIPS: Loongson 2F: Cleanup the #if clauses
This patch adds two new kernel options: CPU_SUPPORTS_CPUFREQ and
CPU_SUPPORTS_ADDRWINCFG to describe the new features of Loongons 2F and
replaces the several ugly #if clauses by them.

These two options will be utilized by the future loongson revisions and
related drivers such as the coming Loongson 2F CPUFreq driver.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:15 +00:00
Wu Zhangjin
6e34358ed4 MIPS: Lemote 2F: Add defconfig file
Add default config file for Lemote Loongson 2F family machines.  The
resulting kernel image can be shared between Fuloong 2F, Yeeloong 2F and
other Lemote Loongson 2F family machines.

If you are using an old PMON, and not using a 2f box, please add a new
command line argument in the boot.cfg.

For example, add this argument for 8.9inches notebook:

    machtype=lemote-yeeloong-2f-8.9inches

or

    machtype=8.9

More information from arch/mips/loongson/common/machtype.c.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:14 +00:00
Wu Zhangjin
2ee98e0f46 MIPS: Lemote 2F: Add reset support
Fuloong 2F, Yeeloong 2F and Menglong 2F have different reset / shutdown
logic.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:14 +00:00
Wu Zhangjin
6616db78ee MIPS: Lemote 2F: Add IRQ support
The generic i8259_irq() will make kernel hang on booting, so Loongson 2F
needs its own polling method.

IP6 is shared by the bonito interrupt and perfcounter interrupts.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:13 +00:00
Wu Zhangjin
1032bce3ef MIPS: Lemote 2F: Add PCI support
PCI support for the Fuloong 2E and Lemote Loongson 2F family machines is
mostly identical with the exception of CS5536 support.

Rename ops-fuloong2e.c to ops-loongson2.c then add the CS5536 support to
share most of the source code among Loongson machines.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:12 +00:00
Wu Zhangjin
22c21003a9 MIPS: Lemote 2F: Add basic CS5536 VSM support
Lemote Loongson 2F family machines use CS5536 as their south bridge and need
these lowlevel interfaces to access the devices on CS5536.

Virtualize the legacy devices on CS5536 as PCI devices.  This way users can
access the CS5536 PCI config space directly as a normal multi-function
PCI 2.2 device.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:12 +00:00
Wu Zhangjin
21a41faa4d MIPS: Lemote 2f: Enable legacy RTC driver
Currently rtclib is not available on Loongson family machines but the
legacy RTC driver works well on them.  Deselect RTC_LIB to allow the legacy
RTC driver to be selected.

The rtclib patch series

   http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=a91e34bf2595157830d599cb66becd52247b1819.1257383766.git.wuzhangjin%40gmail.com

or, in patchworks:

   http://patchwork.linux-mips.org/patch/570/
   http://patchwork.linux-mips.org/patch/571/
   http://patchwork.linux-mips.org/patch/572/

is eventually going to switch Lemote platforms to rtclib.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com 
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:11 +00:00
Wu Zhangjin
7d32c6dd81 MIPS: Lemote 2F: Add a LEMOTE_MACH2F kernel option
Add a new kernel option for Lemote Loongson 2F family machines.

Lemote loongson2f family machines utilize the 2f revision of loongson
processor and the AMD CS5536 south bridge.

Family members include Fuloong 2F mini PC, Yeeloong 2F notebook, LingLoong
all-in-one PC and others.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: zhangfx@lemote.com
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Nicholas Mc Guire <hofrat@hofr.at>
Cc: Arnaud Patard <apatard@mandriva.com>
Cc: loongson-dev@googlegroups.com
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:11 +00:00
Wu Zhangjin
6f7a251a25 MIPS: Loongson: Add basic Loongson 2F support
Loongson 2F has built-in DDR2 and PCI-X controller. The PCI-X controller
has a programming interface similiar to the the FPGA northbridge used on
Loongson 2E.

The main differences between Loongson 2E and Loongson 2F include:

1. Loongson 2F has an extra address window configuration module, which
   is used to map CPU address space to DDR or PCI address space, or map
   the PCI-DMA address space to DDR or LIO address space.

2. Loongson 2F supports 8 levels of software configurable CPu frequency
   which can be configured in the LOONGSON_CHIPCFG0 register.  The coming
   cpufreq and standby support are based on this feature.

Loongson.h abstracts the modules and corresponding methods are abstracted.

Add other Loongson-2F-specific source code including gcc 4.4 support, PCI
memory space, PCI IO space, DMA address.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:10 +00:00
Wu Zhangjin
937893cf5b MIPS: oprofile: Only do performance counter handling for counter interrupts
In Loongson2f IP6 is shared by bonito and perfcounters so we need to avoid
do_IRQ for perfcounter when the interrupt is from bonito.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:10 +00:00
Wu Zhangjin
a3ed495190 MIPS: Loongson: Cleanup the serial port support
To share the same kernel image amon different machines we have added the
machtype command line support.

In the old serial port implementation the UART base address is hardcoded as
a macro in machine.h which breaks with machtype, so change that to discover
the address dynamically.  Also move the initialization of the UART base
address to uart_base.c to avoid remapping twice for early_printk.c and
serial.c.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/581/
Patchwork: http://patchwork.linux-mips.org/patch/682/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:09 +00:00
Wu Zhangjin
04cfb90a92 MIPS: Loongson: Cleanup machtype support
To choose code for different machines by the value of machtype it needs to
be initialized as early as possible.  So move initialization of
mips_machtype to prom_init().

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:08 +00:00
David Daney
b6ee75ed4f MIPS: Collect FPU emulator statistics per-CPU.
On SMP systems, the collection of statistics can cause cache line
bouncing in the lines associated with the counters.  Also there are
races incrementing the counters on multiple CPUs.

To fix both problems, we collect the statistics in per-CPU variables,
and add them up in the debugfs read operation.

As a test I ran the LTP float_bessel test on a 12 CPU Octeon system.

Without CONFIG_DEBUG_FS :             2602 seconds.
With CONFIG_DEBUG_FS:                 2640 seconds.
With non-cpu-local atomic statistics: 14569 seconds.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:08 +00:00
Ralf Baechle
32028f1f7b MIPS: Remove addinitrd and CONFIG_PROBE_INITRD_HEADER
Addinitrd has been superseded by initramfs ages ago.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:07 +00:00
Wu Zhangjin
0e8cccc406 MIPS: Fuloong 2E: Update defconfig file
Enable hibernation support by default. Also enable sparsemem to avoid
the hibernation failures with flatmem and save memory wasted by flatmem.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:06 +00:00
Wu Zhangjin
e2fee5723b MIPS: Bonito64: Make Loongson independent from Bonito64 code.
The built-in Loongson 2E/2F northbridge in is bonito64-compatible but not
identical with it.  To avoid influencing the original bonito64 support and
make the loongson support more maintainable, it's better to separate the
Bonito64 code from the Loongson code.

This also prepares the kernel for the coming Loongson 2f machines family
support.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com,
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:06 +00:00
Wu Zhangjin
e8be528388 MIPS: Loongson: Add serial port support
This patch add serial port support for all of the existing loongson
family machines. most of the board specific part are put in serial.c,
and the base address of the serial ports are defined as macros in
machine.h for sharing it between serial.c and early_printk.c

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:04 +00:00
Wu Zhangjin
db54ff246e MIPS: Loongson early_printk: Fix variable type of uart_base
The uart_base variable here is not a physical address, so, we replace it
by unsigned char *.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:03 +00:00
Wu Zhangjin
f6d4ff02c6 MIPS: Fuloong2e: Cleanup Kconfig
Changes indention from whitespace to tabs in arch/mips/loongson/Kconfig.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:03 +00:00
Wu Zhangjin
659da2ba3e MIPS: Loongson: Register reserved memory pages
Register reserved pages for Loongson family machines.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Cc: yanh@lemote.com,
Cc: huhb@lemote.com
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: zhangfx@lemote.com,
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:02 +00:00
Dmitri Vorobiev
c1b14a7545 MIPS: MIPSsim: Remove unused code
The function prom_init_cmdline() doesn't do anything, and nobody calls the
prom_getcmdline() function. Since these two are the only functions in the
file arch/mips/mipssim/sim_cmdline.c, the whole file can be removed now
along with the call to the no-op prom_init_cmdline() routine.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com>
Patchwork: http://patchwork.linux-mips.org/patch/465/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:01 +00:00
David Daney
82622284dd MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
Processors that support the mips64r2 ISA can in four instructions
convert a shifted PGD pointer stored in the upper bits of c0_context
into a usable pointer.  By doing this we save a memory load and
associated potential cache miss in the TLB exception handlers.

Since the upper bits of c0_context were holding the CPU number, we
move this to the upper bits of c0_xcontext which doesn't have enough
bits to hold the PGD pointer, but has plenty for the CPU number.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:01 +00:00
David Daney
92078e0618 MIPS: Add drotr and dins instructions to uasm.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:01 +00:00
David Daney
a7187a2ffc MIPS: Octeon: Add register definitions for MGMT Ethernet driver.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:56:59 +00:00
David Daney
24479d9f46 MIPS: Octeon: Add platform devices MGMT Ethernet ports.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:56:59 +00:00