Removed explicit linux,phandle usage. Using references and labels now in PQ
and PQ2 boards currently supported in arch/powerpc.
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Adds support for PowerQuicc on-chip PCMCIA. The driver is implemented as
of_device, so only arch/powerpc stuff is capable to use it, which now implies
only mpc885ads reference board.
To cope with the code that should be hooked inside driver, but is really board
specific (like set_voltage), global structure mpc8xx_pcmcia_ops holds
necessary function pointers that are filled in the BSP code.
[akpm@linux-foundation.org: whitespace diddles]
Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Olof Johansson <olof@lixom.net>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Use the eieio function so we can redefine what eieio does rather
than direct inline asm. This is part code clean up and partially
because not all PPCs have eieio (book-e has mbar that maps to eieio).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
sparse caught these static functions / __iomem annotations
under arch/powerpc/platform/52xx/
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add 831x USB platform setup code and rework 834x USB platform setup code.
Move USB platform code to usb.c for different boards with CPU of the same
series to share the USB initialization code.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove redundant pci_read_irq_line() function for 85xx CDS board.
This function has been realized in common ppc pci code.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The PHY is active-low on the MPC85xx CDS and the 8560 ADS just had
the wrong sense for the internal PCI and CPM interrupts.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Remove uses of hack GET_64BIT() property macro and use
the more general of_read_number() function from prom.h
as suggested by Milton.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.
Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
For the 83xx, 85xx, and 86xx device trees, add a "local-mac-address" property
to every Ethernet node that didn't have one. Add a comment indicating that
the "address" and/or "mac-address" properties are deprecated in DTS files
and will be removed at a later time. Change all MAC address properties to
have a zero MAC address value.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Export symbols of qe_lib to be used by QE driver.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Selvamuthukumar V <vsmkumar.84@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Begin with MPC8548 a new reset control register is added that asserts
HRESET_REQ to board logic.
This register is used for chip reset.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The function backing_ops->read_mfc_tagstatus() doesn't return a
correct value because the dma_tagstatus_R register isn't saved in
CSA. This fixes the problem.
Signed-off-by: Kazunori Asayama <asayama@sm.sony.co.jp>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
When waiting for I/O events on mfc in an SPU context by using
poll/epoll syscalls, some of the events can be lost because of wrong
order of poll_wait and MFC status checks in the spufs_mfc_poll
function and non-atomic update of tagwait. This fixes the
problem.
Signed-off-by: Kazunori Asayama <asayama@sm.sony.co.jp>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
spu_activate can be called from multiple threads at the same time on
behalf of the same spu context. We need to make sure to only add it
once to avoid runqueue corruption.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Only enable the scheduler tick if we have any context waiting to be
scheduled.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
We're currently too permissive with counting libassist calls - fix the
check on the SPE stop-and-signal status.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Provide load average information for spu context. The format
is identical to /proc/loadavg, which is also where a lot of code
and concepts is borrowed from.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The new tid file contains the ID of the thread currently running the
context, if any. This is used so that the new spu-top and spu-ps
tools can find the thread in /proc.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Remove redundant whitespace in arch/powerpc/platforms/cell/spufs/
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
spufs_dir_inode_operations is exactly the same as
simple_dir_inode_operations. Use that instead.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
And last but not least we need to make sure the scheduler tick never
preempts a nosched context.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
spu_deactivate should never be called for nosched contets. Put in
a check so we can print a stacktrace and exit early in case it
happes erroneously.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add a cpus_allowed allowed filed to struct spu_context so that we always
use the cpu mask of the owning thread instead of the one happening to
call into the scheduler. Also use this information in
grab_runnable_context to avoid spurious wakeups.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Update scheduling information on every spu_run to allow for setting
threads to realtime priority just before running them. This requires
some slightly ugly code in spufs_run_spu because we can just update
the information unlocked if the spu is not runnable, but we need to
acquire the active_mutex when it is runnable to protect against
find_victim. This locking scheme requires opencoding
spu_acquire_runnable in spufs_run_spu which actually is a nice cleanup
all by itself.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Print out a few scheduler tuning parameters when we've compiled
with DEBUG defined.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The current timeslice code mixes 'jiffies' up with 'spesched ticks'. This
change correctly defines the number of time slices each SPE contexts is
given, and clarifies the comment.
This brings the default timeslice for SPE contexts into a reasonable
range.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Enable preemptive scheduling for non-RT contexts.
We use the same algorithms as the CPU scheduler to calculate the time
slice length, and for now we also use the same timeslice length as the
CPU scheduler. This might be not enough for good performance and can be
changed after some benchmarking.
Note that currently we do not boost the priority for contexts waiting
on the runqueue for a long time, so contexts with a higher nice value
could starve ones with less priority. This could easily be fixed once
the rework of the spu lists that Luke and I discussed is done.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Get rid of the scheduler workqueues that complicated things a lot to
a dedicated spu scheduler thread that gets woken by a traditional
scheduler tick. By default this scheduler tick runs a HZ * 10, aka
one spu scheduler tick for every 10 cpu ticks.
Currently the tick is not disabled when we have less context than
available spus, but I will implement this later.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Add a bit define from book, and replace one hex number with a
symbol, for clarity.
Signed-off-by: Sebastian Siewior <bigeasy@linux.vnet.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Currently it fails with gcc from sdk 2.1 because of a spec change [1].
Maybe we should start using the definitions from spu_mfcio.h.
[1] http://gcc.gnu.org/ml/gcc-patches/2006-11/msg01598.html
Signed-off-by: Sebastian Siewior <bigeasy@linux.vnet.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Use the ppc64 style list management and allocation functions for
pci_controllers. This makes the pci_controller structs just a bit more
common between ppc32 & ppc64.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Moved the low hanging fruit that was either identical or close
to it between ppc32 & ppc64 for PCI into pci-common.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In the places we can move to using pci_bus_to_host, this allows us
to make pci_bus_to_host static and remove its export.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make the ppc32 pcibios_alloc_controller take a device node to match
the ppc64 prototypes and have it set arch_data.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Make the pci_controller struct use global_number for the PHB domain number
instead of index to match what ppc64 does and reuse its pci_domain_nr code.
Introduced a pci-common.c to handle shared code between ppc32 & ppc64.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
There are no in kernel users of any off these functions and some of
them were not even EXPORT_SYMBOL:
- pci_bus_io_base()
- pci_bus_io_base_phys()
- pci_bus_mem_base_phys()
- pci_resource_to_bus()
- phys_to_bus()
- pci_phys_to_bus()
- pci_bus_to_phys()
- pci_init_resource()
- resource_fixup()
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale PCI-e RC poses as a transparent bridge, but does not
implement the IO_BASE or IO_LIMIT registers in the config space. This
means that the code which initializes the bridge resources ends up
setting the IO resources erroneously. Add quick_fsl_pcie_transparent()
to handle this.
This change sets RC of mpc8641 to be a transparent bridge
for legacy I/O access and initializes the RC bridge resources
from the device tree.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In pcibios_fixup_bus(), bridges that are subordinate
to transparent bridges were still relocating their
IORESOURCE_IO and IO_RESOURCE_MEM start and end values.
Fix this by preventing the transparent bridge from
relocating the start and end values, thus allowing the
subordinate non-transparent bridge full molestation rights.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Set IDE in ULI1575 to not 100% native mode, which forces
the IDE driver to probe the irq itself.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The Freescale PCI-e controllers have an issue in that they use the
PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which
bus number to match on when generating a type 0 config cycle. The
issue is if we are renumbering bus numbers to match Linux we will try
setting the PCI_PRIMARY_BUS and will not know which bus number to use
for generating type 0 config cycles. We surpress writing the register
in the P2P bridge and always keep it at zero.
In the future when proper PCI domain support is working we should be
able to remove this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We check the Link Training and State Status register to make sure we
are at least at the L0 state.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The generic PCI config ops indirect support for ppc32 covers only two
cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type.
Added a indirect_type bit mask to handle other variants.
Added support for PCI-e extended registers and moved the cfg_type
handling into the bit mask for ARCH=powerpc. We can also use this to
handle indirect quirks.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This adds device nodes for the PCI bridges as well as the ISA devices on
the newer revision MPC8641HPCN. It also adds the PCI ranges to the soc
node so that address translation for the ISA devices works properly.
Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
