Commit graph

16 commits

Author SHA1 Message Date
Mathias Nyman
2345b20fd9 gpio/langwell_gpio: ack the correct bit for langwell gpio interrupts
The wrong bit was masked when acking langwell gpio interrupts.

Reason for maskig the wrong bit was probably because__ffs() and ffs() functions
return bit indexes differently (0..31 vs 1..32)

This fixes langwell based devices from hanging when a gpio interrupt is
triggered and undoes the breakage which occurred in change set
732063b92b

Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-07-08 09:32:01 -06:00
Kristen Carlson Accardi
7812803a31 langwell_gpio: add runtime pm support
While this is essentially a no-op for this driver, it has the
side effect of letting the PMU driver snoop D3 requests from
the PCI core for this driver.

This is only for langwell, not for whitney point.

Signed-off-by: Kristen Carlson Accardi <kristen@linux.intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-05-26 14:24:36 -06:00
Justin P. Mattock
6eab04a876 treewide: remove extra semicolons
Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-04-10 17:01:05 +02:00
Thomas Gleixner
84bead6c38 gpio/langwell: Clear edge bit before handling
I don't have the specs for this beast, but it looks a lot like the PXA
GPIO block. Though I bet it's the same IP and the driver should have
reused the PXA code.

Acknowleding the edge detect status after handling one or more gpio
interrupts looks wrong. We might lose an edge which came in while we
handled the previous one.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Alek Du <alek.du@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-03-17 23:07:44 -06:00
Thomas Gleixner
732063b92b gpio/langwell: Simplify demux loop
Use __ffs() to find the pending interrupt source instead of looping 32
times.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-03-17 13:49:03 -06:00
Thomas Gleixner
674db90690 gpio/langwell: Convert irq name space
Convert to the new irq function names.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-03-17 13:49:03 -06:00
Thomas Gleixner
20e2aa916f gpio/langwell: Fix broken irq_eoi change.
commit 0766d20fd (langwell_gpio: modify EOI handling following change
of kernel irq subsystem)  changes

 -   desc->chip->eoi(irq);
 +
 +   if (desc->chip->irq_eoi)
 +           desc->chip->irq_eoi(irq_get_irq_data(irq));
 +   else
 +           dev_warn(pg->chip.dev, "missing EOI handler for irq %d\n", irq);

With the following explanation:

 "Latest kernel has many changes in IRQ subsystem and its interfaces,
  like adding irq_eoi" for struct irq_chip, this patch will make it
  support both the new and old interface."

This is completely bogus.

 #1) The changelog does not match the patch at all

 #2) This driver relies on the assumption that it sits behind an eoi
     capable interrupt line. If the implementation of the underlying
     chip changes from eoi to irq_eoi then this driver has to follow
     that change and not add a total bogosity.

 #3) Just mechanically changing eoi to irq_eoi without checking the
     background of that change is sloppy at best.

Remove the sillyness and retrieve the interrupt data from irq_desc
directly. No need to go through a sparse irq lookup.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Feng Tang <feng.tang@intel.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-03-17 13:49:03 -06:00
Feng Tang
0766d20fdb langwell_gpio: modify EOI handling following change of kernel irq subsystem
Latest kernel has many changes in IRQ subsystem and its interfaces, like
adding "irq_eoi" for struct irq_chip, this patch is a follow up change
for that.

Also remove the unnecessary cast for a "void *".

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: Alek Du <alek.du@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-01-26 10:49:59 +10:00
Lennert Buytenhek
5ffd72c674 gpio: langwell_gpio: irq_data conversion
Converts irq_chips and flow handlers over to the new struct irq_data based
irq_chip functions.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Yin Kangkai <kangkai.yin@intel.com>
Cc: Alek Du <alek.du@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-01-13 08:03:13 -08:00
Alan Cox
72b4379e95 langwell_gpio: add support for whitney point
In this case the logic is very similar but the IRQs are not exposed and
the device is not picked up via PCI

Based on a separate internal whitney point driver by Yin Kangkai.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Cc: Yin Kangkai <kangkai.yin@intel.com>
Cc: Alek Du <alek.du@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-27 18:03:07 -07:00
Andrew Morton
fd0574cb54 drivers/gpio/langwell_gpio.c: remove semicolons after function definitions
Deweird this driver.

Cc: Alek Du <alek.du@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-27 18:03:07 -07:00
Alek Du
8081c84c9c gpio: add Penwell gpio support
Intel Penwell chip has two 96 pins GPIO blocks, which are very similiar as
Intel Langwell chip GPIO block, except for pin number difference. This
patch expends the original Langwell GPIO driver to support Penwell's.

Signed-off-by: Alek Du <alek.du@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-05-27 09:12:42 -07:00
Tejun Heo
5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Roel Kluin
4efec6272e gpio: fix test on unsigned in lnw_irq_type()
The wrong test was used, gpio is unsigned and it had an off-by-one.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Cc: Alek Du <alek.du@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-16 07:20:00 -08:00
Alek Du
ca0297015d gpio: Langwell GPIO driver bugfixes
- Remove wrong and unnecessary unmask operation

- Remove extra GEDR reading

This fixes the loss of interrupts which occurs when two or more pins are
triggered in close succession.

Signed-off-by: Alek Du <alek.du@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-01 16:32:19 -08:00
Alek Du
8bf0261770 gpio: add Intel Moorestown Platform Langwell chip gpio driver
The Langwell chip is the IO hub for Intel Moorestown platform which has a
64-pin gpio block device inside.  It is exposed as a dedicated PCI device.
 We use it to control outside peripheral as well as to do IRQ demuxing.
The gpio block uses MSI to send level type interrupt to IOAPIC.

Signed-off-by: Alek Du <alek.du@intel.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-09-23 07:39:48 -07:00