Commit graph

77321 commits

Author SHA1 Message Date
James Hogan
8e6b4dd1e1 CRIS: use kbuild.h instead of defining macros in asm-offset.c
This is modelled on commits such as the one below:

Commit fc1c3a003e ("sh: use kbuild.h
instead of defining macros in asm-offsets.c") introduced in v2.6.26.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
2012-12-20 12:45:40 +01:00
Linus Torvalds
f01af9f858 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull sparc fixes from David Miller:
 "Please pull to get these sparc AES/DES/CAMELLIA crypto bug fixes as
  well as an addition of a pte_accessible() define for sparc64 and a
  hugetlb fix from Dave Kleikamp."

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in CAMELLIA code.
  sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in DES code.
  sparc64: Fix ECB looping constructs in AES code.
  sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in AES code.
  sparc64: Fix AES ctr mode block size.
  sparc64: Fix unrolled AES 256-bit key loops.
  sparc64: Define pte_accessible()
  sparc: huge_ptep_set_* functions need to call set_huge_pte_at()
2012-12-19 20:31:02 -08:00
David S. Miller
62ba63dc89 sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in CAMELLIA code.
We use the FPU and therefore cannot sleep during the crypto
loops.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:44:31 -08:00
David S. Miller
b3a3794707 sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in DES code.
We use the FPU and therefore cannot sleep during the crypto
loops.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:43:38 -08:00
David S. Miller
ce6889515d sparc64: Fix ECB looping constructs in AES code.
Things works better when you increment the source buffer pointer
properly.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:30:07 -08:00
David S. Miller
b35d282ef7 sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in AES code.
We use the FPU and therefore cannot sleep during the crypto
loops.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:22:03 -08:00
David S. Miller
a8d97cef21 sparc64: Fix AES ctr mode block size.
Like the generic versions, we need to support a block size
of '1' for CTR mode AES.

This was discovered thanks to all of the new test cases added by
Jussi Kivilinna.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:20:23 -08:00
David S. Miller
9f28ffc03e sparc64: Fix unrolled AES 256-bit key loops.
The basic scheme of the block mode assembler is that we start by
enabling the FPU, loading the key into the floating point registers,
then iterate calling the encrypt/decrypt routine for each block.

For the 256-bit key cases, we run short on registers in the unrolled
loops.

So the {ENCRYPT,DECRYPT}_256_2() macros reload the key registers that
get clobbered.

The unrolled macros, {ENCRYPT,DECRYPT}_256(), are not mindful of this.

So if we have a mix of multi-block and single-block calls, the
single-block unrolled 256-bit encrypt/decrypt can run with some
of the key registers clobbered.

Handle this by always explicitly loading those registers before using
the non-unrolled 256-bit macro.

This was discovered thanks to all of the new test cases added by
Jussi Kivilinna.

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-19 15:19:11 -08:00
Linus Torvalds
2f0bf92513 Xtensa patchset for v3.8-rc0
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQ0UyjAAoJEI9vqH3mFV2sBBQP/jYZURx5YSHlV8r/36Mjvsfx
 W4zmSsHCHjd7NTWtGF8/ICQ7ZL7Bylx8wRXowEWB94UhsNiWtqXJ6T4sESTWykge
 cI6hhyHw2vswm3BR9tvh6Lg5VZEZZN1eVEcqzj8vxc/i8acO1vYi3QKgAjmrQq9J
 1YReYYXnC1+VSLl79io3hqiTMv/QDqnywzeOEHbh4mbGrSfjnEOvTsF5rHvYdutV
 xdVuHbWE5VzqgF2Pktlj/lW+sDw8jgY+fBSiRXNI7yoRba0TqGe2W4aLHqwM4734
 vLEjfP0kfT/haMEz2HRYJJHMOJgJ8UAwVJFXhsYjTq9QqI+9NGNiq7f9F/gtWPSZ
 l+bfpMJkkeRzk3TI/lIni+hzURSO4uzZl84/KMlwWY5KJedCSAqaoLsdal48OT+a
 8b8N25fZ59KCpGP4txKSmLI6BEbYIYJ0ZBKMjOx8x8O1zQD7/uV2eTr4rSIGqQRY
 N1x0Qw3R6ERIwMKE7EAB6ofFBvVYAiRR3E3pzgxIiXYurQ7n7Gj2OZbkSLaI1uOK
 SrIAdSRImqfma2eU9unWOuMrPl5eZJrEazvzqx8+pDduzf1ffG1fvCXdFYGSZUlX
 2yz6MVgQ6hVXnhyDtxaCxuc5VHHoE1l+05VUK9rsqIfophZRMn9tCLeJkkjxiJ5s
 rbIwHdTmDSTWiO7pscgW
 =fxNt
 -----END PGP SIGNATURE-----

Merge tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux

Pull Xtensa patchset from Chris Zankel:
 "This contains support of device trees, many fixes, and code clean-ups"

* tag 'xtensa-20121218' of git://github.com/czankel/xtensa-linux: (33 commits)
  xtensa: don't try to build DTB when OF is disabled
  xtensa: set the correct ethernet address for xtfpga
  xtensa: clean up files to make them code-style compliant
  xtensa: provide endianness macro for sparse
  xtensa: fix RASID SR initialization
  xtensa: initialize CPENABLE SR when core has one
  xtensa: reset all timers on initialization
  Use for_each_compatible_node() macro.
  xtensa: add XTFPGA DTS
  xtensa: add support for the XTFPGA boards
  xtensa: add device trees support
  xtensa: add IRQ domains support
  xtensa: add U-Boot image support (uImage).
  xtensa: clean up boot make rules
  xtensa: fix mb and wmb definitions
  xtensa: add s32c1i-based spinlock implementations
  xtensa: add s32c1i-based bitops implementations
  xtensa: add s32c1i-based atomic ops implementations
  xtensa: add s32c1i sanity check
  xtensa: add trap_set_handler function
  ...
2012-12-19 13:05:22 -08:00
Linus Torvalds
1bd12c91de Merge branch 'x86/nuke386' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull one final 386 removal patch from Peter Anvin.

IRQ 13 FPU error handling is gone.  That was not one of the proudest
moments in PC history.

* 'x86/nuke386' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, 386 removal: Remove support for IRQ 13 FPU error reporting
2012-12-19 13:02:23 -08:00
Linus Torvalds
ca2a88f56a MTD pull for 3.8
- Various cleanups especially in NAND tests
  - Add support for NAND flash on BCMA bus
  - DT support for sh_flctl and denali NAND drivers
  - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
  - Fix JFFS2 locking bug in ENOMEM failure path
  - New SPI flash chips, as usual
  - Support writing in 'reliable mode' for DiskOnChip G4
  - Debugfs support in nandsim
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iEYEABECAAYFAlDSAa4ACgkQdwG7hYl686MMcACeNYa//ghPtccb5L+IRXsqaFDL
 Yi4AoLWOaOjN8qM4KUF/bfMEkwNGAePz
 =DaAQ
 -----END PGP SIGNATURE-----

Merge tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd

Pull MTD updates from David Woodhouse:
 - Various cleanups especially in NAND tests
 - Add support for NAND flash on BCMA bus
 - DT support for sh_flctl and denali NAND drivers
 - Kill obsolete/superceded drivers (fortunet, nomadik_nand)
 - Fix JFFS2 locking bug in ENOMEM failure path
 - New SPI flash chips, as usual
 - Support writing in 'reliable mode' for DiskOnChip G4
 - Debugfs support in nandsim

* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
  mtd: nand: typo in nand_id_has_period() comments
  mtd: nand/gpio: use io{read,write}*_rep accessors
  mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
  mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
  mtd: nand/docg4: fix and improve read of factory bbt
  mtd: nand/docg4: reserve bb marker area in ecclayout
  mtd: nand/docg4: add support for writing in reliable mode
  mtd: mxc_nand: reorder part_probes to let cmdline override other sources
  mtd: mxc_nand: fix unbalanced clk_disable() in error path
  mtd: nandsim: Introduce debugfs infrastructure
  mtd: physmap_of: error checking to prevent a NULL pointer dereference
  mtg: docg3: potential divide by zero in doc_write_oob()
  mtd: bcm47xxnflash: writing support
  mtd: tests/read: initialize buffer for whole next page
  mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
  mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
  mtd: nand: onfi need to be probed in 8 bits mode
  mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
  mtd: nand: print flash size during detection
  mted: nand_wait_ready timeout fix
  ...
2012-12-19 12:47:41 -08:00
Linus Torvalds
5031a2a7c1 In part2:
- A small patch for the RX51 OMAP board (Nokia N900 phone), the patch
   creates a battery monitor device instance, so that it can be probed. It
   was acked by the OMAP maintainer;
 
 - A couple of late bug fixes for the charger-manager: corrects corner
   cases for the battery full handling.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQIcBAABAgAGBQJQ0P/CAAoJEGgI9fZJve1b1FQP/2EmdDqZ/RLtiDskid4JC8sQ
 NZMGaqhtXzdr4Duukrt7mvmZR0i3mJcSiGMDonsJFPoUXK6Zwr4eWpdL71Ehn7Sh
 0X6ul2iipqUi1g78mpFE8BwwTyzKxsL/+Njj25s/VuBrOYfA+xF44AgDG90/YpUf
 xRwNGsLAESpKCxsT4NKoPSCg6T6SfprPlyECdtt4hWCetntVezc6TON14JU/E2OS
 5Bq07TWKAN/F9a4QIiYDaykTf4NrERwqHnmgA6kHG/Bf0q61ON91UCI4o+UVIGMe
 v3Rc52pZPbqsatOd/t5ujPwBiQwy1+70mMeuYmdw9oJHScAG2+KFKns4dw3zaiIE
 9rpyo3T2E1tiu1/Ny71hiBAqOG5Wuh6USQ02PyUXKnMaZ1Owcr47MfOMoY8LZLV1
 knAfduMi/jpHva3UBRvnShbZMelM5AJk2ctLq/lH8JxljYjh4jcsWNGm++1rLmOr
 jvRpqso4IJxhAoe2i23p7lalsAemwnfR2PfiP3PH/77jJISZrhXZs2e4DwR0N/KM
 pBvfS8DEp2xEcg/0OUXU5O90J6DBaVL0N8fntn9HW8VHf1o/6ETr46b562hAt9s8
 Mp/uPK/FMpMz+a8jsactUGsn2HVuYYDTIQqRW3AeUoaT6hXrYJEdd2iPCZCh1OBF
 KmpjWS3ZDeDTBMpfgZRk
 =hppb
 -----END PGP SIGNATURE-----

Merge tag 'for-v3.8-part2' of git://git.infradead.org/battery-2.6

Pull battery update, part 2, from Anton Vorontsov:
 "These are left overs that I didn't have time to review/apply before
  the merge window opened.  I didn't want to "spoil" the first pull
  request with these late patches, so they were not included:

   - A small patch for the RX51 OMAP board (Nokia N900 phone), the patch
     creates a battery monitor device instance, so that it can be
     probed.  It was acked by the OMAP maintainer;

   - A couple of late bug fixes for the charger-manager: corrects corner
     cases for the battery full handling."

* tag 'for-v3.8-part2' of git://git.infradead.org/battery-2.6:
  charger-manager: Fix bug when check dropped voltage after fullbatt event
  charger-manager: Fix bug related to checking fully charged state of battery
  ARM: OMAP: rx51: Register platform device for rx51_battery
2012-12-19 08:14:08 -08:00
Linus Torvalds
7a684c452e Nothing all that exciting; a new module-from-fd syscall for those who want
to verify the source of the module (ChromeOS) and/or use standard IMA on it
 or other security hooks.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJQ0VKlAAoJENkgDmzRrbjxjuEQALVHpD1cSmryOzVwkNn7rVGP
 PV3KVbUs+qzUCm2c3AafIIlSBm2LOUl+cR3uNC7di8aHarRF3VHkK2OQ4Fx97ECd
 KKBqAyY3R0q1mAKujb/MWwiK0YgosEDIOzGGn2yQhNFsxKqnMB02P4j82IO7+g+w
 Cc3XuDyWHoH2I+ySgz0Q8NHAqufD/DMZUKud7jw2Lsv6PuICJ1Oqgl/Gd/muxort
 4a5tV3tjhRGywHS/8b2fbDUXkybC5NKK0FN+gyoaROmJ/THeHEQDGXZT9bc2vmVx
 HvRy/5k8dzQ6LAJ2mLnPvy0pmv0u7NYMvjxTxxUlUkFMkYuVticikQfwSYDbDPt4
 mbsLxchpgi8z4x8HltEERffCX5tldo/5hz1uemqhqIsMRIrRFnlHkSIgkGjVHf2u
 LXQBLT8uTm6C0VyNQPrI/hUZzIax7WtKbPSoK9lmExNbKqloEFh/mVXvfQxei2kp
 wnUZcnmPIqSvw7b4CWu7HibMYu2VvGBgm3YIfJRi4AQme1mzFYLpZoxF5Pj+Ykbt
 T//Hb1EsNQTTFCg7MZhnJSAw/EVUvNDUoullORClyqw6+xxjVKqWpPJgYDRfWOlJ
 Xa+s7DNrL+Oo1WWR8l5ruoQszbR8szIyeyPKKxRUcQj2zsqghoWuzKAx2saSEw3W
 pNkoJU+dGC7kG/yVAS8N
 =uoJj
 -----END PGP SIGNATURE-----

Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux

Pull module update from Rusty Russell:
 "Nothing all that exciting; a new module-from-fd syscall for those who
  want to verify the source of the module (ChromeOS) and/or use standard
  IMA on it or other security hooks."

* tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux:
  MODSIGN: Fix kbuild output when using default extra_certificates
  MODSIGN: Avoid using .incbin in C source
  modules: don't hand 0 to vmalloc.
  module: Remove a extra null character at the top of module->strtab.
  ASN.1: Use the ASN1_LONG_TAG and ASN1_INDEFINITE_LENGTH constants
  ASN.1: Define indefinite length marker constant
  moduleparam: use __UNIQUE_ID()
  __UNIQUE_ID()
  MODSIGN: Add modules_sign make target
  powerpc: add finit_module syscall.
  ima: support new kernel module syscall
  add finit_module syscall to asm-generic
  ARM: add finit_module syscall to ARM
  security: introduce kernel_module_from_file hook
  module: add flags arg to sys_finit_module()
  module: add syscall to load module from fd
2012-12-19 07:55:08 -08:00
Linus Torvalds
7f2de8171d This single patch is effectively a no-op for now. It enables architectures
to opt in to using GCC's __builtin_bswapXX() intrinsics for byteswapping,
 and if we merge this now then the architecture maintainers can enable it
 for their arch during the next cycle without dependency issues.
 
 It's worth making it a par-arch opt-in, because although in *theory* the
 compiler should never do worse than hand-coded assembler (and of course
 it also ought to do a lot better on platforms like Atom and PowerPC which
 have load-and-swap or store-and-swap instructions), that isn't always the
 case. See http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46453 for example.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iEYEABECAAYFAlDRvNsACgkQdwG7hYl686O7KACeKQMiuZMLB9ctF5u0Iql+33PF
 +WAAnisvZ8HCUjG5E8DF6HWy45r4BjUp
 =eeUs
 -----END PGP SIGNATURE-----

Merge tag 'byteswap-for-linus-20121219' of git://git.infradead.org/users/dwmw2/byteswap

Pull preparatory gcc intrisics bswap patch from David Woodhouse:
 "This single patch is effectively a no-op for now.  It enables
  architectures to opt in to using GCC's __builtin_bswapXX() intrinsics
  for byteswapping, and if we merge this now then the architecture
  maintainers can enable it for their arch during the next cycle without
  dependency issues.

  It's worth making it a par-arch opt-in, because although in *theory*
  the compiler should never do worse than hand-coded assembler (and of
  course it also ought to do a lot better on platforms like Atom and
  PowerPC which have load-and-swap or store-and-swap instructions), that
  isn't always the case.  See

     http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46453

  for example."

* tag 'byteswap-for-linus-20121219' of git://git.infradead.org/users/dwmw2/byteswap:
  byteorder: allow arch to opt to use GCC intrinsics for byteswapping
2012-12-19 07:52:48 -08:00
Max Filippov
055d4db1e1 xtensa: don't try to build DTB when OF is disabled
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:26 -08:00
Chris Zankel
33c760fbb7 xtensa: set the correct ethernet address for xtfpga
The last byte of the mac address is determined by a DIP switch, so
update the OF property with that address.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:26 -08:00
Chris Zankel
c4c4594b00 xtensa: clean up files to make them code-style compliant
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
72100ed7ef xtensa: provide endianness macro for sparse
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
ec747b21c7 xtensa: fix RASID SR initialization
set_rasid_register accepts new RASID SR value, but ASID_USER_FIRST is
ASID value for the ring 1; RASID value is made by ASID_INSERT macro.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
eab5e7a79d xtensa: initialize CPENABLE SR when core has one
XCHAL_CP_NUM is defined in variant/tie.h and it is not included by
head.S, leaving CPENABLE register uninitialised. XCHAL_HAVE_CP is
defined in variant/core.h to 1 when core has CPENABLE SR.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
79fcf52ba0 xtensa: reset all timers on initialization
There are XCHAL_NUM_TIMERS, reset them all.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Wei Yongjun
90e3bc798b Use for_each_compatible_node() macro.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:25 -08:00
Max Filippov
5584b4da78 xtensa: add XTFPGA DTS
Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60
and for ML605.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:24 -08:00
Max Filippov
0d456bad36 xtensa: add support for the XTFPGA boards
The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with
an Xtensa processor and an OpenCores Ethernet device.

Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:24 -08:00
Max Filippov
da844a8177 xtensa: add device trees support
Device trees allow specification of hardware topology and device
parameters at runtime instead of hard-coding them in platform setup
code. This allows running single binary kernel on a range of compatible
boards.

New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat
device tree is passed in it.

Note that current interrupt mapping scheme uses single cell for
interrupt identification. That means that IRQ numbers used in DTS must
be CPU internal IRQ numbers, not external. It is possible to extend
interrupt identification to two cells, and use second cell to tell
external IRQ numbers form internal. That would allow to use single DTS
on multiple boards with different mapping of external IRQ numbers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov
2206d5dd9a xtensa: add IRQ domains support
IRQ domains provide a mechanism for conversion of linux IRQ numbers to
hardware IRQ numbers and vice versus. It is used by OpenFirmware for
linking device tree objects to their respective interrupt controllers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov
0322cabd39 xtensa: add U-Boot image support (uImage).
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov
3f5ec298e5 xtensa: clean up boot make rules
- remove duplicate rules for binary and packed image
- use predefined macros for ld/objcopy/gzip
- remove build-id section from bootable elf image

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov
599bf77a0d xtensa: fix mb and wmb definitions
Define mb and wmb as memw to force memory barrier.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:23 -08:00
Max Filippov
71872b5fb2 xtensa: add s32c1i-based spinlock implementations
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
e5a9f6adba xtensa: add s32c1i-based bitops implementations
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
219b1e4c61 xtensa: add s32c1i-based atomic ops implementations
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
00273125c3 xtensa: add s32c1i sanity check
Add a brief sanity test of S32C1I functionality.  This instruction
is needed by the kernel and userland as part of the base ABI
(including GCC atomic builtins, certain threading packages, future
atomic support in the C++ standard, etc).  However, correct operation
of this instruction requires some cooperation by hardware external to
the processor (such as bus bridge, bus fabric, or memory controller).
Minimally exercising this mechanism and reporting explicit status
early in the boot process is helpful to chip vendors using the Linux
kernel as a benchmark of correctness of hardware.

As it turns out, S32C1I is not exercised by the kernel and by uClibc
based userland as of early June 2008.  This is expected to change
soon as both incorporate more recent open source developments.

Signed-off-by: Marc Gauthier <marc@tensilica.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
28570e8dac xtensa: add trap_set_handler function
trap_set_handler sets new C-handler in the exception table and returns
previous handler.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
c622b29d1f xtensa: initialize atomctl SR
In order to use S32C1I instruction on cores with ATOMCTL SR the register
must be properly initialized.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
733536b865 xtensa: save and restore scompare1 SR on kernel entry
Although scompare1 may be saved/restored by xchal_ncp_{load,store}
macros, explicit save/restore of registers manipulated by the kernel
itself is considered more correct.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:22 -08:00
Max Filippov
2f6ea6a767 xtensa: display s32c1i feature flag in cpuinfo
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Max Filippov
415217efc1 xtensa: fix CPU cache flags formatting
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Max Filippov
288dc2b68c xtensa: properly fix missing compiler barrier in simcall
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Max Filippov
382cb5b917 xtensa: fix build warning for arch/xtensa/mm/tlb.c
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Max Filippov
35b16a9a09 xtensa: provide DMA_ERROR_CODE definition
This fixes the following allmodconfig build error:

drivers/uio/uio_dmem_genirq.c:95:18: error: 'DMA_ERROR_CODE' undeclared (first use in this function)
drivers/uio/uio_dmem_genirq.c:238:18: error: 'DMA_ERROR_CODE' undeclared (first use in this function)
make[3]: *** [drivers/uio/uio_dmem_genirq.o] Error 1

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Max Filippov
94d6c61b97 xtensa: ISS: add BASE_BAUD definition to serial.h
This fixes the following build error in allyesconfig:

drivers/tty/serial/8250/8250_early.c: In function 'parse_options':
drivers/tty/serial/8250/8250_early.c:160:18: error: 'BASE_BAUD' undeclared (first use in this function)

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:21 -08:00
Chris Zankel
d1538c4675 xtensa: provide proper assembler function boundaries with ENDPROC()
Use ENDPROC() to mark the end of assembler functions.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Max Filippov
c0226e34a4 xtensa: make DoubleExceptionVector literals fit the gap
Manually load references to exc_table from the explicit literal in order
to fit DoubleExceptionVector.literals into the available 16-byte gap
before DoubleExceptionVector.text in the absence of link time
relaxation. Without this fix DoubleExceptionVector.literal section
overlaps DoubleExceptionVector.text section in the linked vmlinux image.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Chris Zankel
6550162200 xtensa: add config option to disable linker relaxation
The default linker behavior is to optimize identical literal values and
remove unnecessary overhead from assembler-generated "longcall" sequences
to reduce code size. Provide an option to disable this behavior to improve
compile time.

Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Nicolas Kaiser
02b25d811f xtensa: unbalanced parentheses
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Wanlong Gao
09378d7c21 xtensa:fix the incompatible pointer type warning in time.c
Fix the definition of the function ccount_read to be compatible
to the member read of the structure clocksource.

Signed-off-by: Wanlong Gao <wanlong.gao@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
2012-12-18 21:10:20 -08:00
Linus Torvalds
752451f01c Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux
Pull i2c-embedded changes from Wolfram Sang:
 - CBUS driver (an I2C variant)
 - continued rework of the omap driver
 - s3c2410 gets lots of fixes and gains pinctrl support
 - at91 gains DMA support
 - the GPIO muxer gains devicetree probing
 - typical fixes and additions all over

* 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux: (45 commits)
  i2c: omap: Remove the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE flag
  i2c: at91: add dma support
  i2c: at91: change struct members indentation
  i2c: at91: fix compilation warning
  i2c: mxs: Do not disable the I2C SMBus quick mode
  i2c: mxs: Handle i2c DMA failure properly
  i2c: s3c2410: Remove recently introduced performance overheads
  i2c: ocores: Move grlib set/get functions into #ifdef CONFIG_OF block
  i2c: s3c2410: Add fix for i2c suspend/resume
  i2c: s3c2410: Fix code to free gpios
  i2c: i2c-cbus-gpio: introduce driver
  i2c: ocores: Add support for the GRLIB port of the controller and use function pointers for getreg and setreg functions
  i2c: ocores: Add irq support for sparc
  i2c: omap: Move the remove constraint
  ARM: dts: cfa10049: Add the i2c muxer buses to the CFA-10049
  i2c: s3c2410: do not special case HDMIPHY stuck bus detection
  i2c: s3c2410: use exponential back off while polling for bus idle
  i2c: s3c2410: do not generate STOP for QUIRK_HDMIPHY
  i2c: s3c2410: grab adapter lock while changing i2c clock
  i2c: s3c2410: Add support for pinctrl
  ...
2012-12-18 16:51:10 -08:00
David S. Miller
4a9d1946b0 sparc64: Define pte_accessible()
We can elide flush_tlb_*() calls when _PAGE_VALID is clear
as that is the test used to determine whether or not to
queue up a TLB flush in set_pte_at().

Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-18 16:06:16 -08:00
Dave Kleikamp
6cb9c36975 sparc: huge_ptep_set_* functions need to call set_huge_pte_at()
Modifying the huge pte's requires that all the underlying pte's be
modified.

Version 2: added missing flush_tlb_page()

Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-12-18 15:36:20 -08:00