Commit graph

177 commits

Author SHA1 Message Date
Dave Jones
7ab77e03c1 Longhaul - Revert ACPI C3 on Longhaul ver. 2
Support for Longhaul ver.  2 broke driver for VIA C3 Eden 600MHz with
Samuel 2 core.  Processor is not able to switch frequency anymore.  I
don't know much about this issue at the moment, but until (if ever) I
will know why, this part should be reversed.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-04-20 22:56:29 -07:00
Linus Torvalds
221dee285e Revert "[CPUFREQ] constify cpufreq_driver where possible."
This reverts commit aeeddc1435, which was
half-baked and broken.  It just resulted in compile errors, since
cpufreq_register_driver() still changes the 'driver_data' by setting
bits in the flags field.  So claiming it is 'const' _really_ doesn't
work.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-26 14:55:48 -08:00
Dave Jones
bd5ab26a7d [CPUFREQ] constify some data tables.
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-22 19:11:16 -05:00
Dave Jones
aeeddc1435 [CPUFREQ] constify cpufreq_driver where possible.
Not all cases are possible due to ->flags being set at runtime
on some drivers.

Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-22 19:08:27 -05:00
Thomas Renninger
22f7bb0329 [CPUFREQ] Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI
Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI

Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Dave Jones <davej@redhat.com>

 arch/i386/kernel/cpu/cpufreq/Kconfig |    1 -
 arch/x86_64/kernel/cpufreq/Kconfig   |    1 -
 2 files changed, 2 deletions(-)
2007-02-20 14:23:43 -05:00
Rafa³ Bilski
2b8c0e1302 [CPUFREQ] Longhaul - Redo Longhaul ver. 2
Start using v2 version of Longhaul when available. It provides
voltage scaling and can use ACPI C3 state. That's curious. CPU
will not change frequency on ACPI C3 when v1 is in use, but it will
when v2 is used. Driver will return max frequency all the time if
this isn't true for all processors. There is strange thing with
mobile voltage. Looks like only Nehemiah (C3-M) supports it.
Earlier processors have different mobile VRM (in docs), but I can't
find any which is using it. Looks like all are using VRM 8.5. So
fail for non Nehemiah with mobile VRM.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-14 17:32:06 -05:00
Rafa³ Bilski
b6f45a4b07 [CPUFREQ] EPS - Correct 2nd brand test
Solution for small, but nasty bug: access beyond end of f_table for C7 brand.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-13 22:58:26 -05:00
Dave Jones
bd0561c9d8 [CPUFREQ] Fix up merge conflicts with recent ACPI changes.
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:36:29 -05:00
Rafa³ Bilski
348f31ed2b [CPUFREQ] Longhaul - Separate frequency and voltage transition
This change should make Longhaul more compatible with
both ver. 2 and Powersaver processors. Voltage transitions
will be done before or after frequency transition. That depends
on direction of change. I don't know how to force conservative
governor when voltage scaling is enabled, so there is only
a warning for user. Minimal voltage is calculated in different
way now because in this way more power is saved at lower
multipliers.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:05:50 -05:00
Rafa³ Bilski
e57501c15f [CPUFREQ] Longhaul - Models of Nehemiah
Borowed from VIA driver.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:05:04 -05:00
Rafa³ Bilski
9addf3b638 [CPUFREQ] Longhaul - Simplier minmult
Simple cleanup in code which is setting minmult.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:01:48 -05:00
Rafa³ Bilski
86acd49aa1 [CPUFREQ] Enhanced PowerSaver driver
This is driver for Enhanced Powersaver which is present in VIA C7
processors. Beta tested by Jorgen (jorgen (at) greven dot dk).
Thanks! Based on documentation provided by Dave Jones (Thanks!)
and C7 Eden datasheet available from www.via.com.tw. Looks like all
these C7 Eden CPU's don't have P-states in BIOS. I know that 2
p-states is low, but Jorgen finds it usefull anyway because board
is passive cooled.
There are 3 different types of C7 processors (called brands):
0. C7-M - these processors can set any maultiplier between min and
max, any voltage between min and max.
1. C7 - only min and max states are supported. Voltage is different
for min and max states.
2. Eden - only min and max states are supported. Looks like this
brand can only change multiplier. Voltage seems to be the same for
min and max frequency.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-10 20:01:47 -05:00
Rafa³ Bilski
786f46b262 [CPUFREQ] Longhaul - Add VT8235 support
I don't know why it is working and how, but it is working. On my
Epia transition time is by default set to 100us. I'm changing it to
200us. After that I can change frequency from min (x4.0) to max (x7.5)
without lockup. Many times.
There is a paranoid check at a beginning of a patch. Probably dead
code, but I don't have better ideas for CL10000 case at the moment.
Only way to to detect broken chip seems to be looking in log for
spurious interrupts.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-04 18:09:19 -05:00
Rafa³ Bilski
46ef955f5c [CPUFREQ] Longhaul - Fix guess_fsb function
This is bug reported by John-Marc Chandonia:
> Detected 1002.292 MHz processor.
> longhaul: VIA C3 'Nehemiah B' [C5N] CPU detected.  Powersaver supported.
> longhaul: Using throttling support.
> longhaul: Invalid (reserved) FSB!
FSB is correcly guessed for 999.554 MHz CPU.
To fix this error:
- ROUNDING should be range, not mask - at it's current value it is +7 -8,
- more precise calculations inside guess_fsb - 7.5x133MHz is 1000MHz now.

Signed-off-by: Rafal Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-04 18:09:19 -05:00
Rafa³ Bilski
0d44b2ba28 [CPUFREQ] Longhaul - Remove duplicate tables
Now there is no need to depend on -1 in Nehemiah tables. After
previous change code is eliminating multipliers lower then 5.0
by minmult for Nehemiah A and B.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:25:19 -05:00
Rafa³ Bilski
980342a7eb [CPUFREQ] Longhaul - Introduce Nehemiah C
Looks like some time ago I introduced a bug to Longhaul.
I had report that 9x133Mhz CPU is seen as 5x133MHz. So I
changed multipliers table. That was a mistake. According to
documentation table was correct. So only way to avoid 5 or 9
dilema is not use MaxMHzBR for PowerSaver 1.0. One code that
works on all processors. To do it I need also separate flag for
Nehemiah C (min = x4.0) and Nehemiah (min = x5.0).

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:25:19 -05:00
Joachim Deguara
58389a86df [CPUFREQ] fix cpuinfo_cur_freq for CPU_HW_PSTATE
This fixes the cpuinfo_cur_freq value by using the correct
find_khz_freq_from_fiddid() when the CPU uses hardware p-states.

Signed-off-by: Joachim Deguara <joachim.deguara@amd.com>
Acked-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:25:19 -05:00
Rafa³ Bilski
1479672283 [CPUFREQ] Longhaul - Remove "ignore_latency" option
There is no need to have this option in Longhaul anymore.
It was for laptop with CLE266 chipset in times, when only
ACPI C3 was used to switch frequency. Now we have native
support not only for CLE266, but CN400 too. Would be good
to have support for PN266, but I can't find datasheet for it.
Looks like BIOS for CPU's faster then 1GHz don't support
ACPI C2 nor C3.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-02-03 17:24:08 -05:00
Alexey Starikovskiy
cee324b145 ACPICA: use new ACPI headers.
Signed-off-by: Len Brown <len.brown@intel.com>
2007-02-02 21:14:28 -05:00
Dave Jones
3453c8478a [CPUFREQ] Remove unneeded errata workaround from p4-clockmod.
This workaround unnecessarily cripples functionality to work
around an errata that doesn't seem possible to hit due to
us using the automatic clock throttling in the p4 mcheck code.

See http://lkml.org/lkml/2006/10/28/148 for complete reasoning
and lack of disconsent.

Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-29 00:07:04 -05:00
Dave Jones
43c8f12f9f [CPUFREQ] longhaul: Kill off warnings introduced by recent changes.
Bunch of unused vars + one case where gcc isn't smart enough.

Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-02 23:42:16 -05:00
Guillaume Chazarain
76ff28c941 [CPUFREQ] Uninitialized use of cmd.val in arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c:acpi_cpufreq_target()
cmd.val was used uninitialized on the line below.

Signed-off-by: Guillaume Chazarain <guichaz@yahoo.fr>
Acked-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-02 23:38:39 -05:00
Rafa³ Bilski
24ebead82b [CPUFREQ] Longhaul - Always guess FSB
This is patch that solves Ebox mini PC issue and make
FSB code more specification compilant. At start guess_fsb
function is guessing 200MHz FSB too. It is better to
make it in this way because, thanks to this function, driver
will fail for bogus FSB values caused by bogus multiplier
value. For PowerSaver processors we can't depend on Max /
MinMHzFSB because these values are only used for
PowerSaver 2.0 and 3.0. Most processors on which Longhaul
is used are PowerSaver 1.0 only. I'm changing code for older
CPU's too, but not so much as previously, and this code was
already used for Ezra. Using MinMHzBR for Ezra-T is outside
spec. It is for voltage scaling purpose and don't have to
be equal to minmult (but it is). Same for Nehemiah (it
isn't for sure). Added mult - current multiplier value.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2007-01-02 23:38:39 -05:00
Rafa³ Bilski
264166e604 [CPUFREQ] Longhaul - Fix up powersaver assumptions.
ACPI PM2 register was fallback for "Longhaul ver. 1" CPU's.
My assumption that this register isn't present at
"PowerSaver" motherboards is so far true, but current code
will not work correctly in other case. There are three possible
supports: ACPI C3, PM2 and northbridge. That was my assumption
that ACPI C3 and northbridge is for PS and northbridge and PM2
is for V1. In current code we can only check if it is ACPI
support or not by port22_en. So remove port22_en and add
longhaul_flags. If USE_ACPI_C3 and USE_NORTHBRIDGE are both
clear then it means ACPI PM2 support. Also change order of
support probe from ACPI C3, PM2, northbridge to ACPI C3,
northbridge, ACPI PM2. Paranoid protection against port 0x22
cast as ACPI PM2 register. Bit 1 clear in such case - lockup
on AGP DMA. And obvious (now) fixup for do_powersaver. Use
cx->address only for ACPI C3 ("PowerSaver" processor using
PM2 support).

Signed-off-by: Rafa¿ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-29 15:56:44 -05:00
Dave Jones
1cfe201426 [CPUFREQ] longhaul: Fix up unreachable code.
Signed-off-by: Rafał Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-28 22:30:16 -05:00
Brice Goglin
d349c4a5ae [CPUFREQ] speedstep-centrino: missing space and bracket
A space and a bracket are missing (and indentation is wrong).

Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-22 22:45:41 -05:00
Venkatesh Pallipadi
8edc59d939 [CPUFREQ] Bug fix for acpi-cpufreq and cpufreq_stats oops on frequency change notification
Fixes the oops in cpufreq_stats with acpi_cpufreq driver.  The issue was
that the frequency was reported as 0 in acpi-cpufreq.c.  The bug is due to
different indicies for freq_table and ACPI perf table.

Also adds a check in cpufreq_stats to check for error return from
freq_table_get_index() and avoid using the error return value.

Patch fixes the issue reported at
http://www.ussg.iu.edu/hypermail/linux/kernel/0611.2/0629.html
and also other similar issue here
http://bugme.osdl.org/show_bug.cgi?id=7383 comment 53

Signed-off-by: Dhaval Giani <dhaval.giani@gmail.com>
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-22 22:45:41 -05:00
Dave Jones
928ee513c2 [CPUFREQ] longhaul compile fix.
Some gcc's are more anal than others about empty switch labels.
error: label at end of compound statement

Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-17 19:09:59 -05:00
Dave Jones
8ec9822dd1 [CPUFREQ] Advise not to use longhaul on VIA C7.
C7's are centrino speedstep-alike.

Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-17 19:07:35 -05:00
Mattia Dongili
a507ac4b01 [CPUFREQ] set policy->curfreq on initialization
Check the correct variable and set policy->cur upon acpi-cpufreq
initialization to allow the userspace governor to be used as default.

Signed-off-by: Mattia Dongili <malattia@linux.it>
Acked-by: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-17 18:09:26 -05:00
Venkatesh Pallipadi
4e581ff165 [CPUFREQ] Trivial cleanup for acpi read/write port in acpi-cpufreq.c
Small cleanup in acpi-cpufreq.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-13 18:12:31 -05:00
Rafa³ Bilski
db2fb9db57 [CPUFREQ] Longhaul - Add support for CN400
Support for CN400 northbridge when ACPI C3 isn't available.
Tested on Epia SP13000. Thanks to Robert for testing it.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:33:10 -05:00
Rafa³ Bilski
3f4a25f17e [CPUFREQ] Longhaul - fix 200MHz FSB
On board of Epia SP13000 is 10x133Mhz VIA Nehemiah. It is reported
as 10x200MHz. This patch is fixing this issue.

Signed-off-by: Rafa³ Bilski <rafalbilski@interia.pl>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:33:10 -05:00
Dominik Brodowski
e11952b971 [CPUFREQ] p4-clockmod: fix support for Core
Support for Core CPUs was broken in two ways in speedstep-lib: for x86_64,
we missed a MSR definition; for both x86_64 and i386, the FSB calculation
was wrong by four (it's a quad-pumped bus). Also increase the accuracy
of the calculation.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:29:04 -05:00
Venkatesh Pallipadi
3d4a7ef3d3 [CPUFREQ] Fix the bug in duplicate freq elimination code in acpi-cpufreq
Fix the bug in duplicate states elimination in acpi-cpufreq.

Bug: Due to duplicate state elimiation in the loop earlier, the number
of valid_states can be less than perf->state_count, in which case
freq_table was ending up with some garbage/uninitialized entries
in the table.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
From:  Alexey Starikovskiy <alexey.y.starikovskiy@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:20:50 -05:00
Gary Hade
8b9c6671f8 [CPUFREQ] speedstep-centrino should ignore upper performance control bits
On some systems there could be bits set in the upper half of
the control value provided by the _PSS object.  These bits are
only relevant for cpufreq drivers that use IO ports which are not
currently supported by the speedstep-centrino driver.  The current
MSR oriented code assumes that upper bits are not set and thus
fails to work correctly when they are.  e.g. the control and status
value equality check failed on the IBM x3650 even though the ACPI
spec allows inequality.

Signed-off-by: Gary Hade <garyhade@us.ibm.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:20:49 -05:00
Jean Delvare
55e337345d [CPUFREQ] Optimize gx-suspmod revision ID fetching
We don't need a temporary variable to get the PCI revision ID.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-12-12 17:20:49 -05:00
Dave Jones
474a14df3f Revert "[CPUFREQ] speedstep-centrino should ignore upper performance control bits"
This reverts commit d7a1944e8d.
2006-11-08 19:22:45 -05:00
Alexey Dobriyan
6fdc2d0750 [CPUFREQ] gx-suspmod: fix "&& 0xff" typo
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-11-08 17:14:31 -05:00
akpm@osdl.org
caede347c3 [CPUFREQ] Fix build failure on x86-64
arch/x86_64/kernel/cpufreq/../../../i386/kernel/cpu/cpufreq/speedstep-lib.c:131: error: 'MSR_FSB_FREQ' undeclared (first use in this function)

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-11-08 17:14:31 -05:00
Gary Hade
d7a1944e8d [CPUFREQ] speedstep-centrino should ignore upper performance control bits
On some systems such as the IBM x3650 there are bits set in the
upper half of the control values provided by the _PSS object.
These bits are only relevant for cpufreq drivers that use IO ports
which are not currently supported by the speedstep-centrino driver.
The current MSR oriented code assumes that upper bits are not set
and thus fails to work correctly when they are.  e.g. the control
and status value equality check fails even though the ACPI spec
allows the inequality.

Signed-off-by: Gary Hade <garyh@us.ibm.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-11-08 17:14:30 -05:00
Dominik Brodowski
4e74663c5d [CPUFREQ] p4-clockmod: add more CPUs
Several more Intel CPUs are now capable using the p4-clockmod cpufreq
driver. As it is of limited use most of the time, print a big bold warning
if a better cpufreq driver might be available.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-11-06 19:17:40 -05:00
Dave Jones
95625b8f19 [CPUFREQ] ifdef more unused on !SMP code.
acpi-cpufreq needs the same patch as the previous speedstep-centrino change.
Additionally, the centrino driver can have its ifdef moved out a little
further to eliminate some more code/variables.

Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-21 01:37:39 -04:00
Andrew Morton
fe0f96020d [CPUFREQ] speedstep-centrino: remove dead code
arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c:396: warning: 'sw_any_bug_dmi_table' defined but not used

Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-21 01:33:13 -04:00
Dave Jones
95dd722700 [CPUFREQ] acpi-cpufreq: Fix up some CodingStyle nits leftover from the lindenting.
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-18 00:41:48 -04:00
Dave Jones
0a1230acb5 [CPUFREQ] Remove duplicate include from acpi-cpufreq
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-18 00:15:49 -04:00
Hiroshi Miura
8c61936849 [CPUFREQ] Fix speedstep-smi CPU detection to not run on Pentium 4.
If someone inserts speedstep-smi on a mobile P4, it prevents other cpufreq
modules from loading until it is unloaded.

Signed-off-by: Hiroshi Miura <miura@da-cha.org>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-18 00:12:07 -04:00
Amol Lad
3e74341c7b [CPUFREQ] sc520_freq.c: ioremap balanced with iounmap
ioremap must be balanced by an iounmap and failing to do so can result
in a memory leak.

Tested (compilation only):
- using allmodconfig
- making sure the files are compiling without any warning/error due to
new changes

Signed-off-by: Amol Lad <amol@verismonetworks.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-18 00:08:55 -04:00
Venkatesh Pallipadi
dfde5d62ed [CPUFREQ][8/8] acpi-cpufreq: Add support for freq feedback from hardware
Enable ondemand governor and acpi-cpufreq to use IA32_APERF and IA32_MPERF MSR
to get active frequency feedback for the last sampling interval. This will
make ondemand take right frequency decisions when hardware coordination of
frequency is going on.

Without APERF/MPERF, ondemand can take wrong decision at times due
to underlying hardware coordination or TM2.
Example:
* CPU 0 and CPU 1 are hardware cooridnated.
* CPU 1 running at highest frequency.
* CPU 0 was running at highest freq. Now ondemand reduces it to
  some intermediate frequency based on utilization.
* Due to underlying hardware coordination with other CPU 1, CPU 0 continues to
  run at highest frequency (as long as other CPU is at highest).
* When ondemand samples CPU 0 again next time, without actual frequency
  feedback from APERF/MPERF, it will think that previous frequency change
  was successful and can go to wrong target frequency. This is because it
  thinks that utilization it has got this sampling interval is when running at
  intermediate frequency, rather than actual highest frequency.

More information about IA32_APERF IA32_MPERF MSR:
Refer to IA-32 Intel® Architecture Software Developer's Manual at
http://developer.intel.com

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-15 19:57:11 -04:00
Venkatesh Pallipadi
a6f6e6e6ab [CPUFREQ][7/8] acpi-cpufreq: Fix get of current frequency breakage
Recent speedstep-centrino unification onto acpi-cpufreq patchset broke
cpuinfo_cur_freq interface in /sys/../cpuinfo/, when MSR was used for
transitions. Attached patch fixes that breakage.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Dave Jones <davej@redhat.com>
2006-10-15 19:57:11 -04:00