This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.
The function intc_set_priority() should be used instead to set the
desired interrupt priority level.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch provides a correct value for CONFIG_SH_PCLK_FREQ for the
SH7712 solution engine when used with the board's default factory
settings. This results in the board running at its maximum CPU clock
rate (200 MHz).
Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch provides specific clock support for the SH7712.
Signed-off-by: Andrew Murray <amurray@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Change occurances of:
bool
default X
to:
def_bool X
Change ocurances of:
bool "Foo"
default X
to:
def_bool X
prompt "Foo"
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in the L1I/L1D/L2 cache shape support to their respective
entries in the ELF auxvt, based on the Alpha implementation. We use
this on the userspace libc side for calculating a tightly packed
SHMLBA amongst other things.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch changes the uImage target so that it generates a wrapped
compressed vmlinux, rather than a wrapped zImage. The previous version
matched the ARM, this version matches the PPC. However I would question
how useful a self decompressing image is with a boot loader which does
decompression, so I think this is more useful. I also feel it matches
the descrition in the help text ("Compressed kernel image") better.
Signed-off-by: Thomas Betker <thomas.betker@5etech.eu>
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This saves us from having to use kmalloc() for the fixmap entries,
which is needed early for the uncached fixmap.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently most of the 29-bit physical parts do P1/P2 segmentation
with a 1:1 cached/uncached mapping, jumping between the two to
control the caching behaviour. This provides the basic infrastructure
to maintain this behaviour on 32-bit physical parts that don't map
P1/P2 at all, using a shiny new linker section and corresponding
fixmap entry.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This implements kernel-level atomic rollback built on top of gUSA,
as an alternative non-IRQ based atomicity method. This is generally
a faster method for platforms that are lacking the LL/SC pairs that
SH-4A and later use, and is only supportable on legacy cores.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Shoves a magic word in to the empty_zero_page section for the
bootloader to work out whether to start the kernel in 29-bit
or 32-bit mode.
[ Renesas CPUs already take care of the initial PMB mappings entirely
in hardware and decide on 29-bit/32-bit physical depending on which
pin powered up the CPU, so this is mostly for ST parts. -- PFM ].
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
mem= can't be used to grow the size of kernel memory, so provide a
warning to that effect.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7263 (SH-2A) CPU.
This particular CPU is a superset of SH7203, adding some additional
peripheral blocks and hooking up additional (reserved on SH7203)
vectors in the INTC block.
No visibly nasty surprises, yet..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This was using the absolute path, which was confusing the make target.
Switch it to just 'zImage', as per powerpc.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
