Commit graph

9 commits

Author SHA1 Message Date
Adrian Bunk
b991b590dc [MIPS] RM: fix EISA=n compilation
This patch fixes the following build error with CONFIG_EISA=n caused by
commit 231a35d372:

<--  snip -->

...
  LD      .tmp_vmlinux1
arch/mips/sni/built-in.o: In function `snirm_a20r_setup_devinit':
a20r.c:(.init.text+0x42c): undefined reference to `sni_eisa_root_init'
a20r.c:(.init.text+0x42c): relocation truncated to fit: R_MIPS_26 against `sni_eisa_root_init'
arch/mips/sni/built-in.o: In function `snirm_setup_devinit':
rm200.c:(.init.text+0x52c): undefined reference to `sni_eisa_root_init'
rm200.c:(.init.text+0x52c): relocation truncated to fit: R_MIPS_26 against `sni_eisa_root_init'
make[1]: *** [.tmp_vmlinux1] Error 1

<--  snip  -->

Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-19 17:01:34 +00:00
Thomas Bogendoerfer
231a35d372 [MIPS] RM: Collected changes
- EISA support for non PCI RMs (RM200 and RM400-xxx). The major part
  is the splitting of the EISA and onboard ISA of the RM200, which
  makes the EISA bus on the RM200 look like on other RMs.
- 64bit kernel support
- system type detection is now common for big and little endian
- moved sniprom code to arch/mips/fw
- added call_o32 function to arch/mips/fw/lib, which uses a private
  stack for calling prom functions
- fix problem with ISA interrupts, which makes using PIT clockevent
  possible

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29 10:14:59 +00:00
Atsushi Nemoto
1d9ef3ecd7 [MIPS] Kill duplicated setup_irq() for cp0 timer
Also many plat_timer_setup() can be killed too.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-19 18:15:58 +01:00
Ralf Baechle
49a89efbbb [MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11 23:46:15 +01:00
Thomas Bogendoerfer
06cf5583fd [MIPS] SNI RM updates
- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
  SNI caches are using 128 L2 cache lines)

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10 17:33:03 +01:00
Thomas Bogendoerfer
f13cc01d8d [MIPS] SNI: MIPS_CPU_IRQ_BASE cleanup
Use MIPS_CPU_IRQ_BASE instead of own define.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-26 23:06:06 +00:00
Thomas Bogendoerfer
c066a32a89 [MIPS] Support for several more SNI RM models.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-18 21:31:37 +00:00
Thomas Bogendoerfer
4a0312fca6 [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors.
Added support for RM200C machines with big endian firmware
Added support for RM200-C40 (R5000 support)
    
Signed-off-by: Florian Lohoff <flo@rfc822.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00