Commit graph

54 commits

Author SHA1 Message Date
Mark Brown
17a52fd60a ASoC: Begin to factor out register cache I/O functions
A lot of CODECs share the same register data formats and therefore
replicate the code to manage access to and caching of the register
map. In order to reduce code duplication centralised versions of
this code will be introduced with drivers able to configure the use
of the common code by calling the new snd_soc_codec_set_cache_io()
API call during startup.

As an initial user the 7 bit address/9 bit data format used by many
Wolfson devices is supported for write only CODECs and the drivers
with straightforward register cache implementations are converted to
use it.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-07-05 17:24:50 +01:00
Mark Brown
1a01417e85 ASoC: Fix WM8960 leaks on probe failure
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-07-05 15:47:03 +01:00
Mark Brown
b3b50b3f31 ASoC: Add suspend and resume callbacks to Wolfson CODEC drivers
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-06-13 22:30:18 +01:00
Mark Brown
f2644a2c00 ASoC: Add WM8960 CODEC driver
The WM8960 is a low power, high quality stereo codec designed for
portable digital audio applications.

Stereo class D speaker drivers provide 1W per channel into 8W loads.
Guaranteed low leakage, excellent PSRR and pop/click suppression
mechanisms enable direct battery connection for the speaker supply.

The device also integrates a complete microphone interface and a stereo
headphone driver. External component requirements are drastically
reduced as no separate microphone, speaker or headphone amplifiers are
required. Advanced on-chip digital signal processing performs automatic
level control for the microphone or line input.

Stereo 24-bit sigma-delta ADCs and DACs are used with low power
over-sampling digital interpolation and decimation filters and a
flexible digital audio interface.

The master clock can be input directly or generated internally by an
onboard PLL, supporting most commonly-used clocking schemes.

This driver was originally written by Liam Girdwood, with substantial
subsequent additions and updates for feature completeness and changes in
the ASoC framework from me.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-04-13 15:11:46 +01:00