CS5530/SC1200 specifies that two drives on the same cable cannot mix
UDMA/MDMA. Add {cs5530,sc1200}_udma_filter() to handle this. This also
makes it possible to remove open-coded best DMA mode selection and use
standard ide_use_dma()/ide_max_dma_mode() helpers. While at it bump
version numbers.
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
ide_start_power_step() and set_using_dma() were missing ->dma_off_quietly
call (comment in probe_hwif() states that DMA should be always cleared before
tuning is attempted). Fix it.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* remove code enabling IORDY and prefetch from config_chipset_for_dma(),
as the comment states it has no real effect because these settings are
overriden when the PIO mode is set (and for this driver ->autotune == 1
so PIO mode is always programmed)
* use ide_tune_dma() in pdcnew_config_drive_xfer_rate() and remove no longer
needed config_chipset_for_dma()
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Use ide_tune_dma() in ali15x3_config_drive_for_dma() and remove all the open
coded DMA tuning code and also config_chipset_for_dma(). Set ->atapi_dma flag
correctly in init_hwif_common_ali15x3() so ide_tune_dma() can take care of
checking if ATAPI DMA is allowed and remove open coded ATAPI DMA check from
ali15x3_config_drive_for_dma().
There should be no functionality changes caused by this patch.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
to program PIO5 by config_art_rwp_pio() could result in incorrect PIO
timings being programmed and possibly the data corruption (for < ATA100
family chipsets PIO0 timings were used, for ATA100 and ATA100a - the random
content of test1 variable was used, for ATA133 - MWDMA0 timings were used)
* BUG() in sis5513_tune_chipset() if somebody tries to force unsupported PIO5,
also cleanup this function a bit while at it
* add comment about PIO0 timings for < ATA100 family chipsets
* remove open-coded best PIO mode selection from config_art_rwp_pio(),
it contained numerous bugs:
- it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
before using them
- it tried to found out maximum PIO mode basing on minimum IORDY cycle time
(moreover wrong cycle times were used for PIO1/5)
- it was overriding PIO blacklist and conservative PIO "downgrade" done
by ide_get_best_pio_mode()
* use sis5513_tune_drive() instead of config_art_rwp_pio()
in sis5513_config_xfer_rate() so the correct PIO mode is also set
on drive even if the device is not IORDY/DMA capable
* config_art_rwp_pio() was always setting the best possible mode and not
the wanted one - fix it and move ide_get_best_pio_mode() call to
config_chipset_for_pio()
* don't use ide_find_best_mode() in config_chipset_for_pio(), it was being
overriden by config_art_rwp_pio() for the host timings anyway + we need to
set the same PIO mode on the device and the host
* pass correct "pio" argument (255 instead of 5) to sis5513_tune_drive() call
in sis5513_config_xfer_rate() so the best PIO mode is set on the drive
and not PIO4
* rename sis5513_tune_drive() to sis5513_tuneproc()
and config_chipset_for_pio() to sis5513_tune_driver()
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* limit max PIO mode to PIO4, this driver doesn't support PIO5 and attempt
to program PIO5 by svwks_tune_chipset() could result in incorrect PIO
timings being programmed and possibly the data corruption (it seems that
the minimum possible values were used but I lack the datasheets to be sure)
* select best PIO mode in svwks_tune_drive() and not in svwks_tune_chipset()
when doing PIO autotuning (pio == 255)
* don't try to tune PIO in config_chipset_for_dma() as ide_dma_enable() could
return 1 if DMA was previously enabled (svwks_config_drive_xfer_rate()
takes care of PIO tuning if no suitable DMA mode is found)
* remove config_chipset_for_pio() and use svwks_tune_drive() instead,
config_chipset_for_pio() contained numerous bugs when selecting PIO mode
(luckily it was only used for devices limited to PIO by capabilities/BIOS):
- it didn't check for validity of id->eide_pio_modes and id->eide_pio_iordy
before using them
- it tried to found out maximum PIO mode basing on minimum IORDY cycle time
(moreover wrong cycle times were used for PIO0/1/5)
- it was overriding PIO blacklist and conservative PIO "downgrade" done
by ide_get_best_pio_mode()
- if the max drive PIO was PIO5 then XFER_PIO_0/XFER_PIO_SLOW was selected
(XFER_PIO_SLOW is not supported by svwks_tune_chipset() so the result
was the same as if using XFER_PIO_5 => wrong PIO timings were set)
- it was overriding drive->current_speed
* bump driver version
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This patch is based on the documentation (I would like to thank Promise
for it) and also partially on the older vendor driver.
Rewrite mode programming code:
* disable 66MHz clock in pdc202xx_tune_chipset() so it is correctly disabled
even if both devices on the channel are not DMA capable and after reset
* enable/disable IORDY and PREFETCH bits in pdc202xx_tune_chipset()
as they need to be setup correctly also for PIO only devices, plus IORDY
wasn't disabled for non-IORDY devices and PREFETCH wasn't disabled for
ATAPI devices
* remove dead code for setting SYNC_ERDDY_EN bits from config_chipset_for_dma()
(driver sets ->autotune to 1 so PIO modes are always programmed => lower
nibble of register A never equals 4 => "chipset_is_set" is always true)
* enable PIO mode programming for all ATAPI devices
(it was limited to ->media == ide_cdrom devices)
* remove extra reads of registers A/B/C, don't read register D et all
* do clearing / programming of registers A/B/C in one go
(gets rid of extra PCI config space read/write cycle)
* set initial values of drive_conf/AP/BP/CP variables to zero
(paranoia for the case when PCI reads fail)
* remove XFER_UDMA6 to XFER_UDMA5 remapping case - it can't happen
(ide_rate_filter() takes care of it)
* fix XFER_MW_DMA0 timings (they were overclocked, use the official ones)
* fix bitmasks for clearing bits of register B:
- when programming DMA mode bit 0x10 of register B was cleared which
resulted in overclocked PIO timing setting (iff PIO0 was used)
- when programming PIO mode bits 0x18 weren't cleared so suboptimal
timings were used for PIO1-4 if PIO0 was previously set (bit 0x10)
and for PIO0/3/4 if PIO1/2 was previously set (bit 0x08)
* add FIXME comment about missing locking for 66MHz clock register
Also while at it:
* remove unused defines
* do a few cosmetic / CodingStyle fixes
* bump driver version
v2:
* in pdc202xx_tune_chipset() the old content of drive configuration
registers is used only by the debugging code so cover "drive_conf"
PCI registers read by #if PDC202XX_DEBUG_DRIVE_INFO
(Noticed by Sergei Shtylyov)
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband:
IPoIB/cm: Optimize stale connection detection
IB/mthca: Set cleaned CQEs back to HW ownership when cleaning CQ
IB/mthca: Fix posting >255 recv WRs for Tavor
RDMA/cma: Add check to validate that cm_id is bound to a device
RDMA/cma: Fix synchronization with device removal in cma_iw_handler
RDMA/cma: Simplify device removal handling code
IB/ehca: Disable scaling code by default, bump version number
IB/ehca: Beautify sysfs attribute code and fix compiler warnings
IB/ehca: Remove _irqsave, move #ifdef
IB/ehca: Fix AQP0/1 QP number
IB/ehca: Correctly set GRH mask bit in ehca_modify_qp()
IB/ehca: Serialize hypervisor calls in ehca_register_mr()
IB/ipath: Shadow the gpio_mask register
IB/mlx4: Fix uninitialized spinlock for 32-bit archs
mlx4_core: Remove unused doorbell_lock
net: Trivial MLX4_DEBUG dependency fix.
This reverts commit f64da958df.
Andi Kleen is unhappy with the changes, and they really do not seem
worth it. IPMI could use DIE_NMI_IPI instead of the new callback, even
though that ends up having its own set of problems too, mainly because
the IPMI code cannot really know the NMI was from IPMI or not.
Manually fix up conflicts in arch/x86_64/kernel/traps.c and
drivers/char/ipmi/ipmi_watchdog.c.
Cc: Andi Kleen <ak@suse.de>
Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Cc: Corey Minyard <minyard@acm.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
In the presence of some running RX connections, we repeat
queue_delayed_work calls each 4 RX WRs, which is a waste. It's enough
to start stale task when a first passive connection is added, and
rerun it every IPOIB_CM_RX_DELAY as long as there are outstanding
passive connections.
This removes some code from RX data path.
Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
mthca_cq_clean() updates the CQ consumer index without moving CQEs
back to HW ownership. As a result, the same WRID might get reported
twice, resulting in a use-after-free. This was observed in IPoIB CM.
Fix by moving all freed CQEs to HW ownership.
This fixes <https://bugs.openfabrics.org/show_bug.cgi?id=617>
Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Fix posting lists of > 255 receive WRs for Tavor: rq.next_ind must
be updated each doorbell, otherwise the next doorbell will use an
incorrect index.
Found by Ronni Zimmermann at Mellanox.
Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Several checks in the rdma_cm check against the state of the
cm_id, but only to validate that the cm_id is bound to an underlying
transport specific CM and an RDMA device. Make the check explicit
in what we're trying to check for, since we're not synchronizing
against the cm_id state.
This will allow a user to disconnect a cm_id or reject a connection
after receiving a device removal event.
Signed-off-by: Sean Hefty <sean.hefty@intel.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
The cma_iw_handler needs to validate the state of the rdma_cm_id before
processing a new connection request to ensure that a device removal is
not already being processed for the same rdma_cm_id. Without the state
check, the user can receive simultaneous callbacks for the same cm_id, or
a callback after they've destroyed the cm_id.
Signed-off-by: Sean Hefty <sean.hefty@intel.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Add a new routine and rename another to encapsulate common code for
synchronizing with device removal.
Signed-off-by: Sean Hefty <sean.hefty@intel.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
- Scaling code is still considered experimental, so disable it by default
- Increase version to SVNEHCA_0023
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
eHCA's sysfs attributes are now being created via sysfs_create_group(),
making the process neatly table-driven. The return value is checked, thus
fixing a few compiler warnings.
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
- In ehca_process_eq(), we're IRQ safe throughout the whole function, so we
don't need another _irqsave in the middle of flight.
- take_over_work() is only called by comp_pool_callback(), so it can move
into the same #ifdef block.
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
AQP0/1 should report qp_num={0|1} and the actual QP# should be stored
in struct ehca_qp, not the other way round.
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
The driver needs to always supply the "GRH present" flag to the
hypervisor, whether it's true or false. Not supplying it (i.e. not
setting the corresponding mask bit) amounts to a "perhaps", which we
don't want.
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Some pSeries hypervisor versions show a race condition in the allocate
MR hCall. Serialize this call per adapter to circumvent this problem.
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Once upon a time, GPIO interrupts were rare. But then a chip bug in
the waldo series forced the use of a GPIO interrupt to signal packet
reception. This greatly increased the frequency of GPIO interrupts
which have the gpio_mask bits set on the waldo chips. Other bits in
the gpio_status register are used for I2C clock and data lines, these
bits are usually on. An "unlikely" annotation leftover from the old
days was improperly applied to these bits, and an unnecessary chip
mmio read was being accessed in the interrupt fast path on waldo.
Remove the stagnant unlikely annotation in the interrupt handler and
keep a shadow copy of the gpio_mask register to avoid the slow mmio
read when testing for interruptable GPIO bits.
Signed-off-by: Arthur Jones <arthur.jones@qlogic.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
uar_lock spinlock was used in mlx4_ib_cq_arm without being initialized
(this only affects 32-bit archs, because uar_lock is not used on
64-bit archs and MLX4_INIT_DOORBELL_LOCK() is a NOP).
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc:
pxamci: fix PXA27x MMC workaround for bad CRC with 136 bit response
mmc: use assigned major for block device
sdhci: handle dma boundary interrupts
mmc: au1xmmc command types check from data flags
* master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6:
[SPARC64]: Update defconfig.
[VIDEO]: XVR-500 and XVR-2500 need FB=y.
[SPARC32]: asm/system.h needs asm/smp.h
[SPARC32]: Update defconfig.
[SPARC32]: Fix sparc32 kdebug changes.
[SPARC64]: Accept ebus_bus_type for generic DMA ops.
[SPARC64]: Add missing cpus_empty() check in hypervisor xcall handling.
[SCSI]: Add help text for SCSI_ESP_CORE.
[SPARC] SBUS: display7seg.c needs asm/io.h
[SPARC] SBUS: bbc_i2c.c needs asm/io.h
[SPARC64]: Be more resiliant with PCI I/O space regs.
[SERIAL] SUNHV: Add an ID string.
... and make it depend on the response flag instead of the command type.
Signed-off-by: Nicolas Pitre <npitre@mvista.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
When the device hits certain memory boundaries, it signals an
interrupt and expects to be serviced. We don't need the feature
but we need to make sure the device doesn't stall.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This patch has changed command types check from data flags.
MMC_STOP_TRANSMISSION is never passed to au1xmmc_send_command().
SEND_STOP() is used for MMC_STOP_TRANSMISSION.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
... doh
Jeremy Fitzhardinge noted that the recent loop.c cleanups worked, but
cause lockdep to complain.
Ouch. OK, the deadlock is real and yes, I'm an idiot. Speaking of which,
we probably want to s/lock/pin/ in drivers/base/map.c to avoid such
brainos again. And yes, this stuff needs clear documentation. Will try
to put one together once I get some sleep...
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
CONFIG_MLX4_DEBUG works out to a def_bool y for those that have
CONFIG_EMBEDDED set. Make it depend on MLX4_CORE.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
When trying to load the ipmi_si module on a powerpc with no BMC (baseboard
management controller) the driver failes to load correctly, but doesn't
unregister itself from of_platform. So, on a second modprobe the kernel
crashes. This patch adds the missing unregister call.
Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Corey Minyard <minyard@acm.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Fix a rather obvious error that Patrick found in the setup routines. Need to
set the proper address space in the ACPI case.
Signed-off-by: Corey Minyard <minyard@acm.org>
Cc: Patrick Schoeller <Patrick.Schoeller@hp.com>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
On PPC64, we need to include asm/prom.h for function definitions.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Flush the tty flip buffer when the line discipline input queue is flushed,
including the user call tcflush(TCIFLUSH/TCIOFLUSH). This prevents
unexpected stale data after a user application calls tcflush().
Signed-off-by: Alan Cox <alan@redhat.com>
Cc: Antonino Ingargiola <tritemio@gmail.com>
Signed-off-by: Paul Fulghum <paulkf@microgate.com>
Cc: Theodore Ts'o <tytso@mit.edu>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
pm3fb_setup() should only compiled if pm3fb is built statically in the kernel.
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch creates platform_device entries for the Marvell mv64x60
ethernet controller ports, based on information contained in the
device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
