Both at91 and avr32 defines its own platform data structure for
the macb driver and both share common structures though at91
includes a currently unused phy_irq_pin. Create a common
macb_platform_data for macb that both at91 and avr32 can use. In
future we can use this to support other architectures that use the
same IP block with the macb driver.
v2: rename eth_platform_data to macb_platform_data and allow at91_ether
to share the platform data with macb.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Adds extra parameter to AT32 at32_map_usart(), so as to reserve
RTS/CTS/CLK pins.
All boards under arch/avr32/boards have been updated (trivial change), but
not all have been tested.
Signed-off-by: Peter Ma <pma@mediamatech.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This patch will adjust the setup the DMA controller for the AC97
Controller in the at32ap700x machine code. This setup matches the new
ALSA driver for the AC97C.
The struct ac97c_platform_data has been moved into its own header file
located in the sound include path.
Tested on ATSTK1006 + ATSTK1000.
This patch will setup the AC97 controller properly for the adjusted
machine code. Both EVKLCD10x and Hammerhead board has been updated.
Tested on EVKLCD10x, and copied to Hammerhead board.
Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold with board code update]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
at32_add_device_mci() will refuse to add the mci device if the data
parameter is NULL. Fix up the favr-32 and hammerhead boards so that this
doesn't happen.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Alex Raimondi <mailinglist@miromico.ch>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel. It offers versatile peripherals, such as ethernet, usb
device, usb host etc.
The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).
Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.
This patch does include the basic support for the fpga device driver,
but not the device driver itself.
Signed-off-by: Alex Raimondi <mailinglist@miromico.ch>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
