Techwizz/kernel-fxtec-pro1x
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6 commits

Author SHA1 Message Date
Matthew Wilcox
53c9577e9c NVMe: Fix admin IRQ claim on real hardware 
The admin IRQ is supposed to use the pin-based (or single message MSI)
interrupt.  Accomplish this by filling in entry[0]'s vector with the
INTx irq number.

Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00
Matthew Wilcox
821234603b NVMe: Rename 'cycle' to 'phase' 
It's called the phase bit in the current draft

Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00
Matthew Wilcox
1b23484bd0 NVMe: Implement per-CPU queues 
Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00
Matthew Wilcox
b3b06812e1 NVMe: Reduce set_queue_count arguments by one 
sq_count and cq_count are always the same, so just call it 'count'.

Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00
Matthew Wilcox
3001082cac NVMe: Factor out queue_request_irq() 
Two callers with an almost identical long string of arguments, and
introducing a third soon.  Time to factor out the commonalities.

Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00
Matthew Wilcox
b60503ba43 NVMe: New driver 
This driver is for devices that follow the NVM Express standard

Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
 2011-11-04 15:52:51 -04:00