Add a common entry-macro-vic2.S for systems where there are two VICs
so that the machine or platform directories just need to setup the
correct information before including <asm/entry-macro-vic2.S> into
their own entry-macro.S file.
Since this code is from the S3C64XX project, we update the S3C64XX
machine entry code to use this new header.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the handling for the UART interrupts out of the s3c64xx specific
code and into plat-samsung so that it can be used by all implementations
that need it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the VIC based timer interrupt handling out of plat-s3c64xx and
into plat-samsung to be re-used for other systems. This also reduces
the code size as we now have a common init routine and use the irq_desc
to store the interrupt number of the timer.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add s3c_register_clocks() to register an array of clocks, printing
an error message if there is a problem. Replace all points in the code
where this could be used.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The new code calls the clock setup code on registration which
can be before the clock system has been fully initialised. The
following code re-does this setup at the end of the clock
registration and thus we get two printings.
Update the calls to only print on the last pass or when doing
the necessary resume work.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Change these two fields to have named initialisers as per the
review comments from Kyungmin Park.
sed used:
s@\.reg_src\(.*\)=\(.*\){\(.*\),\(.*\),\(.*\)}@.reg_src\1=\2{ .reg =\3, .shift =\4, .size =\5 }@g
s@\.reg_div\(.*\)=\(.*\){\(.*\),\(.*\),\(.*\)}@.reg_div\1=\2{ .reg =\3, .shift =\4, .size =\5 }@g
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Reduce the size of struct clk by 12 bytes and make defining clocks with
common implementation functions easier by moving the set_rate, get_rate,
round_rate and set_parent calls into a new structure called 'struct clk_ops'
and using that instead.
This change does make a few clocks larger as they need their own clk_ops,
but this is outweighed by the number of clocks with either no ops or having
a common set of ops.
Update all the users of this.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Clean out the definitions we are no longer using after the new clock
code updates.
Signed-off-by: Harald Welte <laforge@gnumonks.org>
[ben-linux@fluff.org: split from initial patch provided]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Move the s3c6400-clock.c implementation over to use the new common
plat-samsung based clock-clksrc.c.
Note, this does not delete the clocks definitions that are now unused
in the regs-clock.h to reduce the quantity of change in this commit.
Based on original patches by Harald Welte.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The individually named clocks are all static to the code
and thus can be compressed into a single array and then
the array can be referenced. This removes the need for
a seperate array of pointers to clocks.
Fix a minor problem of re-initialising the pointers in
s3c6400_set_clksrc() as this is also called by the cpufreq
code. Move these initialisations to the code that does the
registration.
Based on Harald Welte's original clock changes patch.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Remove the four fields from clksrc_clk.clk which are always the same
and init them when the clock is registered. This helps remove the amount
of repeated code.
This is a re-work of Harald Welte's clock changes for the latest kernel.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
There is a possibility of a loop happening in the PLL output clock
chain on the S3C64XX series. clk_mpll's parent was set to be
clk_mout_mpll, but this is fed from clk_fout_epll (which is also
clk_mpll).
clk_mpll is meant to be the output from the MPLL, and clk_mout_mpll
is a seperate clock derived from the mux of clk_mpll and clk_fin_mpll
and thus should be considered a seperate clock.
Anything using clk_mpll directly really should not be relying on this
being the clock that is eventually routed to a peripheral, so remove the
loop and ensure that the clocks accurately represent the clock chain
in the device.
The clk_mpll is not being used outside of the s3c6400-clock.c code, so
this change should not break anything else.
Do the same for the EPLL.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The symbols aren't declared and don't need to be exported, they go
along with the device structure.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
The naming of the defines suggests that there are three IISv4 ports
with one data line each when in fact there is a single IISv4 port
with three data lines.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This adds support for the third SDHCI controller.
Signed-off-by: Maurus Cuelenaere <mcuelenaere@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The documentation for the S3C6410 CPU voltage scaling is rather
unclear, with omitted values for several speed settings. Originally
the code was using only quoted values, resulting in some fairly odd
settings. The S3C6410 is also unusual in that the both the maximum
and minimum voltages quoted scale as the frequency rises, rather
than just the minimum voltage.
Clean this up a bit by always using the specified typical settings
as the minimum voltage (ignoring any specified minimum voltage) in
order to avoid running near the edge of the processor capabilities.
Also use the next quoted maximum voltages rather than the typical
voltages where no maximum voltage is quoted, allowing operation on
a greater range of systems.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Currently the transition latency reported by the S3C64xx cpufreq
driver includes both the time for the CPU to reclock itself and
the time for a regulator to change voltage. This means that if
a regulator is not in use then the transition latency reported
is excessively high.
In future the regulator API will be extended to report latencies
so the driver will be able to query the performance of a given
regulator.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This provides symmetry with the voltage based checks done for the
regulator.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
We need to free the buff and lli nodes if the buffer queue is
not CIRCULAR.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
buffdone callback should be called per buffer request with pointer
to the latest serviced request.
'next' should point to the one next to currently active.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Some devices don't seem to work if the source and desitnation transfer
widths are not same. For example, SPI dma xfers, with 8bits/word,
don't work without this patch.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Replace s3c64xx_dma_tcirq and s3c64xx_dma_errirq with the common
s3c64xx_dma_buffdone.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Ensure the DMA buffer points are not updated from
another source during the process of enquing a buffer.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
[ben-linux@fluff.org: Updated patch comment]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The current code assumes that the external clock mux will be set to
the crystal. Set this up explicitly within the clock API.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Fix the values of S3C6400_CLKDIV0_ARM_MASK and S3C6410_CLKDIV0_ARM_MASK.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Set up some IRQ space to allocation to off-SoC interrupt controllers.
Default this to 16 IRQs. If individual boards require more than this
then they will need to modify this file so allocating a small number
helps reduce the number of modifications required.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
s3c2410_dma_enqueue makes call to kzalloc and dma_pool_alloc with GFP_KERNEL
flag set, this can be an issue for drivers, like I2S, which call
s3c2410_dma_enqueue from dma-bufferdone callback.
Change the flag GFP_KERNEL to GFP_ATOMIC to avoid any problems.
Signed-Off-by: Jassi <jassi.brar@samsung.com>
[ben-linux@fluff.org: Minor description edit and re-wrap]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Provide actual minimum(struct pl080s_lli) size of block to
dma_pool_create call, instead of hardcoded 32 bytes.
Signed-Off-by: Jassi <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Correct the lli structure in struct s3c64xx_dma_buff which should
have been 'struct pl080s_lli' (samsung specific) instead of the generic
version 'struct pl080_lli'
Signed-Off-by: Jassi <jassi.brar@samsung.com>
[ben-linux@fluff.org: Edited description and subject fields]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
In s3c64xx_roundrate_clksrc function, the calculation is wrong. This
patch fixes this calculation.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This ensures the clock hierarchy data structures are updated when we
change the clock source in the actual hardware registers.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of subject]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
In s3c64xx_setrate_clksrc() we used sclk->shift, but actually need to
use sclk->divider_shift to correctly calculate the value for the divider
register.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[ben-linux@fluff.org: Minor re-indentation of description]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Currently the S5PC100 does not define S3C_PA_NAND, leaving the NAND device
definitions in arch/arm/plat-s3c/dev-nand.c unbuildable. Add a KConfig
entry to select whether this is built.
As backwards compatibility, both the S3C24XX and S3C64XX define the new
configuration in their main Kconfig files until better support for basing
this selection on a per-machine basis can be sorted out.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Allowing us to make the Kconfig a little bit saner.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
The value of armclk_mask needs to be inverted for use as a mask on
the register value when updating ARM_RATIO.
This is critical for cpufreq support, without it attempts to scale
the frequency of the core trash pretty much the entire clock tree.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
If the requested clock is faster than the parent clock then the
parent clock is the closest we can get to the request so we need
to return that instead of the requested clock.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
fix the following 'make includecheck' warning:
arch/arm/plat-s3c64xx/pm.c: plat/regs-gpio.h is included more than once.
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
N group
Add to_irq() function to onvert gpio to irq for external interrupt
group (GPN).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
