Newer parts have slots at entry+64 for michael mic and can do WPA-TKIP
in hardware. The open-sourced Atheros HAL has code for accessing this
portion so now we know how where to put the key material.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Be sure we clear out both the mic (if applicable) and
the encryption key type.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* In set_opmode don't handle antenna settings and preserve other STA_ID1 settings
(shouldn't matter because we call it during reset but it makes things cleaner)
Also set properly AP/ADHOC indicator flag on CFG while setting AP/ADHOC modes
and always enable key search mode.
* Properly set BSSID Mask during reset (cache it and reuse it durring set_associd)
* Update beacon_init to flush pending BMISS interrupts and handle setting of adhoc
beacon ATIM policy flag for ad-hoc mode. Also set TSF to 0 to start TSF increment
on AP mode. We need to handle sleep timers for AR5212 there + add support for PCF.
* Properly clean MIC key from keytable when TKIP is used (Bob is working on set_key
function etc so i leave it for now).
Tested on AR5212 (Hainan) and AR5413 and works fine
v2 Set PISR on AR5211+ and ISR on AR5210, got to sleep more ;-)
Changes-Licensed-under: ISC
Signed-Off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
According to the newly-released Atheros HAL code, asserting the
TSF reset bit will toggle a hardware internal state, resulting in a
spurious reset on the next chip reset. Whenever we force a TSF bit,
write the bit twice to clear the internal signal.
Signed-off-by: Bob Copeland <me@bobcopeland.com>
Acked-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
There's really no reason for mac80211 to be using its
own interface type defines. Use the nl80211 types and
simplify the configuration code a bit: there's no need
to translate them any more now.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
* No code changes...
* Split hw.c to multiple files for better maintenance and add some documentation on each file
code is going to grow soon (eeprom.c for example is going to get much stuff currently developed
on ath_info) so it's better this way.
* Rename following functions to maintain naming scheme:
ah_setup_xtx_desc -> ah_setup_mrr_tx_desc
(Because xtx doesn't say much, it's actually
a multi-rate-retry tx descriptor)
ath5k_hw_put_tx/rx_buf - > ath5k_hw_set_tx/rxdp
ath5k_hw_get_tx/rx_buf -> ath5k_hw_get_tx/rxdp
(We don't put any "buf" we set descriptor pointers on hw)
ath5k_hw_tx_start -> ath5k_hw_start_tx_dma
ath5k_hw_start_rx -> ath5k_hw_start_rx_dma
ath5k_hw_stop_pcu_recv -> ath5k_hw_stop_rx_pcu
(It's easier this way to identify them, we also
have ath5k_hw_start_rx_pcu which completes the
set)
ath5k_hw_set_intr -> ath5k_hw_set_imr
(As in get_isr we set imr here, not "intr")
* Move ath5k_hw_setup_rx_desc on ah->ah_setup_rx_desc so we can
include support for different rx descriptors in the future
* Further cleanups so that checkpatch doesn't complain
(only some > 80 col warnings for eeprom.h and reg.h as usual
due to comments)
Tested on 5211 and 5213 cards and works ok.
Changes-licensed-under: ISC
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Acked-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
