* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (42 commits)
atmel-mci: fix sdc_reg typo
tmio_mmc: add maintainer
mmc: Add OpenFirmware bindings for SDHCI driver
sdhci: Add quirk for forcing maximum block size to 2048 bytes
sdhci: Add quirk for controllers that need IRQ re-init after reset
sdhci: Add quirk for controllers that need small delays for PIO
sdhci: Add set_clock callback and a quirk for nonstandard clocks
sdhci: Add get_{max,timeout}_clock callbacks
sdhci: Add support for hosts reporting inverted write-protect state
sdhci: Add support for card-detection polling
sdhci: Enable only relevant (DMA/PIO) interrupts during transfers
sdhci: Split card-detection IRQs management from sdhci_init()
sdhci: Add support for bus-specific IO memory accessors
mmc_spi: adjust for delayed data token response
omap_hsmmc: Wait for SDBP
omap_hsmmc: Fix MMC3 dma
omap_hsmmc: Disable SDBP at suspend
omap_hsmmc: Do not prefix slot name
omap_hsmmc: Allow cover switch to cause rescan
omap_hsmmc: Add 8-bit bus width mode support
...
This patch adds a new driver: sdhci-of. The driver is similar to
the sdhci-pci, it contains common probe code, and controller-specific
ops and quirks.
So far there are only Freescale eSDHC ops and quirks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Currently the SDHCI driver works with PCI accessors (write{l,b,w} and
read{l,b,w}).
With this patch drivers may change memory accessors, so that we can
support hosts with "weird" IO memory access requirments.
For example, in "FSL eSDHC" SDHCI hardware all registers are 32 bit
width, with big-endian addressing. That is, readb(0x2f) should turn
into readb(0x2c), and readw(0x2c) should be translated to
le16_to_cpu(readw(0x2e)).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This supports MMC/SD/SDIO currently found on the Kirkwood 88F6281 and
88F6192 SoC controllers.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically
the same as in the MX1, but unlike the MX1 controller the MX2
controller just works as expected. Since the MX1 driver has more
workarounds for bugs than anything else I had no success with supporting
MX1 and MX2 in a sane way in one driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Add omap hsmmc controller for 2430 and 34xx.
Note that this controller has different registers compared to
the earlier omap MMC controller, so sharing code currently is
not possible.
Various updates and fixes from linux-omap list have been
merged into this patch.
Signed-off-by: Madhusudhan Chikkature<madhu.cr@ti.com>
Acked-by: Pierre Ossman <drzeus@drzeus.cx>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This adds support for DMA transfers through the generic DMA engine
framework with the DMA slave extensions.
The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 7.5 MiB/s on fast cards with debugging disabled.
Unfortunately, the driver has been known to lock up from time to time
with DMA enabled, so DMA support is currently optional and marked
EXPERIMENTAL. However, I didn't see any problems while testing 13
different cards (MMC, SD and SDHC of different brands and sizes), so I
suspect the "Initialize BLKR before sending data transfer command" fix
that was posted earlier fixed this as well.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
The TMIO chips are only found (and thus tested) on ARM machines.
Moreover, we don't want the TMIO cells to be built if one of the TMIO
driver is not selected (which indirectly make the TMIO cells drivers
depend on ARM as well).
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
This patch adds support for the MMC subdevice 'cell' commonly found in
TMIO based MFDs.
Signed-off-by: Ian Molton <spyro@f2s.com>
Acked-by: Pierre Ossman <drzeus@drzeus.cx>
Signed-off-by: Samuel Ortiz <sameo@openedhand.com>
This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.
This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.
This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)
Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.
The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.
The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.
Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This is the latest S3C MMC/SD driver by Thomas Kleffel
with cleanups as suggested by AKPM done by Ben Dooks.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Thomas Kleffel <tk@maintech.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
The SDHCI interface is not PCI specific, yet the Linux driver was
intimitely connected to the PCI bus. This patch properly separates
the PCI specific portion from the bus independent code.
This patch is based on work by Ben Dooks but he did not have time
to complete it.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Both of these drivers work well (although some hardware still has
its problems) and are not in the "alpha" quality that EXPERIMENTAL
suggests.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Thanks to Matt Domsch and Rezwanul Kabir at Dell, we know how to disable the
MMC controller on the multi-function Ricoh R5C832. The MMC controller needs
to be disabled or it will steal MMC cards from the SD controller where they
would otherwise be supported by the Linux SDHCI driver.
Signed-off-by: Philipl Langdale <philipl@overt.org>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This is the latest version of the MMC-over-SPI support. It works
on 2.6.23-rc2 plus git-mmc (from rc1-mm2), along with the preceding
patches which teach the rest of the MMC stack about SPI.
The main issue of note is that sometimes cards need to be power cycled
to recover after certain faults. Also, it may sometimes be necessary
to disable CRCs. ("modprobe mmc_core use_spi_crc=n")
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: mikael.starvik@axis.com,
Cc: Hans-Peter Nilsson <hp@axis.com>
Cc: Jan Nikitenko <jan.nikitenko@gmail.com>
Cc: Mike Lavender <mike@steroidmicros.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Change Kconfig objects from "menu, config" into "menuconfig" so
that the user can disable the whole feature without having to
enter the menu first.
Signed-off-by: Jan Engelhardt <jengelh@gmx.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
