Commit graph

3 commits

Author SHA1 Message Date
Stefan Roese
28ef35eb33 powerpc/44x: Fix L2-cache support for 460GT
Also set L2C_CFG_RDBW on 460GT platforms and not only on 460EX.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2010-02-10 08:21:14 -05:00
Stefan Roese
93173ce272 [POWERPC] 4xx: Create common ppc4xx_reset_system() in ppc4xx_soc.c
This patch creates a common system reset routine for all 40x and 44x
systems. Previously only a 44x routine existed. But since this system
reset via the debug control register is common for 40x and 44x let's
share this code for all those platforms in ppc4xx_soc.c.

This patch also enables CONFIG_4xx_SOC for all 40x and 44x platforms.

Tested on Kilauea (405EX) and Canyonlands (440EX).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-04-02 20:44:56 -05:00
Stefan Roese
2a7069190e [POWERPC] 4xx: Add PPC4xx L2-cache support (440GX)
This patch adds support for the 256k L2 cache found on some IBM/AMCC
4xx PPC's. It introduces a common 4xx SoC file (sysdev/ppc4xx_soc.c)
which currently "only" adds the L2 cache init code. Other common 4xx
stuff can be added later here.

The L2 cache handling code is a copy of Eugene's code in arch/ppc
with small modifications.

Tested on AMCC Taishan 440GX.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-03-26 07:27:54 -05:00