When the bandwidth is not wide enough, the transfer endpoint may be set to
the one of the alternate setting 0. This one may be null and this causes a
divide by 0 oops.
Reported-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Let the subdrivers to set the 'image transfer by bulk' flag.
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Set the analog gain at sensor init. Also set a sensible default value.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Add the possibility to control the exposure on the vv6410 sensor
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
The ASUS A6K needs the vflip quirk. Thanks to Marco Baldo for reporting
the issue.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Ensure that the hflip and vflip is consistent when the sensor needs to
be vflip quirked or not.
Signed-off-by: Grégory Lardière <spmf2004-m560x@yahoo.fr>
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
The SXGA resolution doesn't work unless you first force the VGA resolution.
More investigation is needed in order to fix this the "right" way.
Signed-off-by: Grégory Lardière <spmf2004-m560x@yahoo.fr>
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Red and blue balance missed their id fields
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
SXGA resolution needs more testing. Disable it for now
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
A number of parameters to some functions in the m5602 are constant and should be flagged as such.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
The C99 specification states in section 6.11.5:
The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.
[mchehab@redhat.com: Fix a trivial merge conflict]
Cc: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Getting QVGA to be supported on the po1030 seems harder than I first thought. I need access to the proper hardware in order to fix it up.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
The QVGA resolution currently hasn't been verified to work. Disable it for now.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Remove some redundant init from the s5k4aa. All these registers are programmed again later in the init phase
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
mt9m111: Hflip and vflip shall always be 0 at start and the image shall be correctly aligned.
The mt9m111 is hflipped and vflipped by default. Correct the semantics to make this happen.
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Based on how the ov9650 is configured, make an educated guess on the hsync/vsync setup for the ov7660
Signed-off-by: Erik Andrén <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
s5k83a: All v4l2 ctrls are initialized later, no need to set those registers during init.
Signed-off-by: Erik Andr?n <erik.andren@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
