The data sheet of the i.MX35 says it is an ARM1136JF-S processor, version r1p3,
which, according to section "B.1. New instructions" of the ARM1136JF-S and
ARM1136J-S Technical Reference Manual, makes the i.MX35 CPU architecture not
only ARMv6, but ARMv6k.
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: <linux-arm-kernel@lists.infradead.org>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Prior to the new i.mx clock conversion the mx27 silicon version was printed at boot.
Reenable this feature.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Two bug fixes for the previous state of the imx sparse irq changes.
* 'imx/sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: select USE_OF
ARM: imx: Fix build error due to missing irqs.h include
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds snippets to the i.MX51/53 devicetrees for the nand
flash controller.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Commit
544496a (ARM: imx: move irq_domain_add_legacy call into avic driver)
introduced unconditional calls to irq_find_mapping and
irq_domain_add_legacy, but it's still possible to have a .config without
CONFIG_IRQ_DOMAIN=y resulting in
CC arch/arm/plat-mxc/avic.o
arch/arm/plat-mxc/avic.c: In function 'avic_handle_irq':
arch/arm/plat-mxc/avic.c:172: error: implicit declaration of function 'irq_find_mapping'
arch/arm/plat-mxc/avic.c: In function 'mxc_init_irq':
arch/arm/plat-mxc/avic.c:207: error: implicit declaration of function 'irq_domain_add_legacy'
arch/arm/plat-mxc/avic.c:208: error: 'irq_domain_simple_ops' undeclared (first use in this function)
arch/arm/plat-mxc/avic.c:208: error: (Each undeclared identifier is reported only once
arch/arm/plat-mxc/avic.c:208: error: for each function it appears in.)
arch/arm/plat-mxc/avic.c:208: warning: assignment makes pointer from integer without a cast
make[3]: *** [arch/arm/plat-mxc/avic.o] Error 1
make[2]: *** [arch/arm/plat-mxc/avic.o] Error 2
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
While selecting CONFIG_IRQ_DOMAIN would be enough, USE_OF is the future
and implies CONFIG_IRQ_DOMAIN. So select USE_OF for ARCH_MXC and drop
other explicit selects that are superflous now.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The SCC clock is needed in internal boot mode and so must keep enabled.
This same issue was fixed for the pre-common-clk code in commit
3d6e614 (mx35: Fix boot ROM hang in internal boot mode)
Cc: John Ogness <jogness@linutronix.de>
Cc: Hans J. Koch <hjk@hansjkoch.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Aas the flexcan driver has DT binding for some time now. This patch makes
the flexcan driver available in the can drivers menu if a SOC with flexcan
is enabled.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
From Shawn Guo <shawn.guo@linaro.org>, this makes it possible to use
sparse irqs with mach-imx.
* 'imx/sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx: enable SPARSE_IRQ for imx platform
ARM: fiq: change FIQ_START to a variable
tty: serial: imx: remove the use of MXC_INTERNAL_IRQS
ARM: imx: remove unneeded mach/irq.h inclusion
i2c: imx: remove unneeded mach/irqs.h inclusion
ARM: imx: add a legacy irqdomain for mx31ads
ARM: imx: add a legacy irqdomain for 3ds_debugboard
ARM: imx: pass gpio than irq number into mxc_expio_init
ARM: imx: leave irq_base of wm8350_platform_data uninitialized
dma: ipu: remove the use of ipu_platform_data
ARM: imx: move irq_domain_add_legacy call into avic driver
ARM: imx: move irq_domain_add_legacy call into tzic driver
gpio/mxc: move irq_domain_add_legacy call into gpio driver
ARM: imx: eliminate macro IRQ_GPIOx()
ARM: imx: eliminate macro IOMUX_TO_IRQ()
ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
commit 435ca24 (ARM i.MX: Visstrim_M10: Add board version detection)
included <asm/system.h>, which is a header file about to be deleted according to
9f97da (Disintegrate asm/system.h for ARM)
Include <asm/system_info.h> instead.
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
There are a number of clkdev lookups left over from commit b0286f2
(ARM: imx6q: prepare and enable init on clks directly instead of
clk_get first), remove them since they are not needed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Call irq_alloc_descs to get the irq_base for mx31ads, and add a legacy
irqdomain using the irq_base, so that the mapping between mx31ads
hardware irq and Linux irq number can be dynamically handled by
irqdomain. As the result, the use of MXC_BOARD_IRQ_START can be
completely removed from mach-mx31ads.c.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Change mxc_expio_init interface a little bit to have gpio than irq
number passed in. With the change, gpio_to_irq can be called inside
mxc_expio_init to get irq number, so that MXC_IRQ_TO_GPIO can be
removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
With commit d1738ae (mfd: Allocate wm835x irq descs dynamically) being
in the tree, there is no need to initialize irq_base field of struct
wm8350_platform_data. Remove it to save one reference to macro
MXC_BOARD_IRQ_START.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
The struct ipu_platform_data is used by platform code to pass
MXC_IPU_IRQ_START to ipu-core driver. We can save it by having
ipu-core driver call irq_alloc_descs to get the irq_base.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Move irq_domain_add_legacy call from imx27-dt.c into avic init function
and have the avic driver adopt irqdomain support for both DT and non-DT
boot.
Now avic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between avic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Move irq_domain_add_legacy call from imx5*-dt.c into tzic init function
and have the tzic driver adopt irqdomain support for both DT and non-DT
boot.
Now tzic init function calls irq_alloc_descs to get irq_base and adds
a lenacy irqdomain with the irq_base, so that the mapping between tzic
irq and Linux irq number can be handled by irqdomain.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Move irq_domain_add_legacy call from imx*-dt.c into gpio driver and
have the gpio driver adopt irqdomain support for both DT and non-DT
boot.
With all imx platform code converted from static gpio irq number
computation to use run-time gpio_to_irq call, we can now use
irq_alloc_descs and irqdomain support to dynamically get irq_base
and have the mapping between gpio and irq number available without
using virtual_irq_start and MXC_GPIO_IRQ_START.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
This patch changes all the static gpio irq number assigning with
IRQ_GPIOA() ... IRQ_GPIOF() to run-time assigning with gpio_to_irq
call, and in turn eliminates these macros.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
This patch changes all the static gpio irq number assigning with
IOMUX_TO_IRQ() to run-time assigning with gpio_to_irq call, and
in turn eliminates the macro IOMUX_TO_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
This patch changes all the static gpio irq number assigning with
IMX_GPIO_TO_IRQ() to run-time assigning with gpio_to_irq call, and
in turn eliminates the macro IMX_GPIO_TO_IRQ().
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
When moving to common clk framework, the imx6q clks rom and mmdc_ch1_axi
get different on/off states than old clk driver, which breaks suspend
function. There might be a better way to manage these clocks, but let's
takes the old clk driver approach to fix the regression first.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Cleanup the code for the otg_mode command line param:
* Use the bool type as it applies here.
* Qualify otg_mode_host with __initdata since this variable is only used in this
context.
* The __setup functions are not supposed to return a status code, but a boolean
indicating whether the param has been handled. See obsolete_checksetup() in
init/main.c.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'imx/fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM i.MX imx21ads: Fix overlapping static i/o mappings
ARM i.MX27 Visstrim M10: fix gpio handling.
ARM: imx: only call l2x0_init if it's available
ARM: imx: only specify i2c device type once
ARM: mx31_3ds: Fix build due to missing IMX_HAVE_PLATFORM_IMX_SSI
* 'imx/clk-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM i.MX53: Fix PLL4 base address
ARM i.MX pllv2: make round_rate accurate
ARM i.MX pllv2: use standard register set unconditionally
The statically defined I/O memory regions for the i.MX21 on chip
peripherals and the on board I/O peripherals of the i.MX21ADS board
overlap. This results in a kernel crash during startup. This is fixed
by reducing the memory range for the on board I/O peripherals to the
actually required range.
Signed-off-by: Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable <stable@vger.kernel.org>
* 'imx/fixes-for-3.5' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6: exit coherency when shutting down a cpu
ARM: mx51: Add pinctrl_provide_dummies()
ARM: mx31: Add pinctrl_provide_dummies()
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'imx-clk-common-fixes' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes
From Sascha Hauer: "Some fixes for the fresh i.MX common clock support"
Resolved trivial conflict in arch/arm/plat-mxc/include/mach/common.h.
* tag 'imx-clk-common-fixes' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: imx6q: prepare and enable init on clks directly instead of clk_get first
ARM i.MX: remove now unnecessary argument from mxc_timer_init
ARM: i.MX: change timer clock from ipg to perclk
ARM i.MX5: fix gpt peripheral clock path
Signed-off-by: Olof Johansson <olof@lixom.net>
There is a system hang issue on imx6q which can easily be seen with
running a cpu hotplug stress testing (hotplug secondary cores from
user space via sysfs interface for thousands iterations).
It turns out that the issue is caused by coherency of the cpu that
is being shut down. When shutting down a cpu, we need to have the
cpu exit coherency to prevent it from receiving cache, TLB, or BTB
maintenance operations broadcast by other CPUs in the cluster.
Copy cpu_enter_lowpower() and cpu_leave_lowpower() from mach-vexpress
to have coherency properly handled in platform_cpu_die(), thus fix
the issue.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: stable@kernel.org
Some GPIOs in Visstrim M10 are used without being registered.
This leads to USB and video malfunctions. This patch registers
those GPIOs to solve the issue.
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add basic imx6q cpuidle driver. For now, only basic WFI state is
supported. Deeper idle states will be added in the future.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Add various functionality needed to enable a imx53 low power idle
state. This includes adding the imx53 gpc_dvfs clock and making a
common imx5_late_init function and initializing all imx53
MACHINE_STATE late_init calls to imx5_late_init.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The imx5 idle code that existed in mm-imx5.c is moved to pm-imx5.c.
The imx5_pm_init call is now exported and called during the
MACHINE_START late_init in supported imx5 platforms.
Remove various enabling/disabling of the gpc_dvfs clock and
enable it once during initialization. This is a very low
power clock that must be enabled during low power operations.
There are only two "suspend_state_t" imx5 low power modes ever
used. STOP_POWER_OFF for suspend to mem and
WAIT_UNCLOCKED_POWER_OFF for idle and suspend to standby. The
latter mode only requires 500 nanoseconds of extra hardware
exit time beyond a basic WFI operation (WAIT_CLOCKED mode) so
no other idle mode is necessary. Given this information, it
is more efficient to keep the registers in the often used
WAIT_UNCLOCKED_POWER_OFF state and only to and from the
STOP_POWER_OFF register state as needed when suspend to
mem is required.
Signed-off-by: Robert Lee <rob.lee@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
MX53_DPLL4_BASE accidently returned the base address of PLL3.
Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
in round_rate we made the assumption that we can set arbitrary
frequencies and thus returned the input rate. This is not correct,
for certain frequencies after setting a frequency with set_rate,
recalc_rate will return different values. To fix this, introduce
set_rate/recalc_rate functions which work on variables instead
of registers directly. This way we can call these in round_rate
to get the exact rate which we would get if we call set_rate
with this value.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The i.MX5 PLL has two different register sets for setting the
rate. One is used for the standard case and and is used for
DVFS. Which one of them is used depends on a hardware input
of the PLL. Current implementation reads back from the hardware
which setting is used. This is bogus: If we ever want to implement
DVFS we have to program both register sets and not only the one
which happens to be used at the moment. For now, just use the
standard register set uncondionally.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
- Updates to mxc_nand and gpmi drivers to support new boards and device tree
- Improve consistency of information about ECC strength in NAND devices
- Clean up partition handling of plat_nand
- Support NAND drivers without dedicated access to OOB area
- BCH hardware ECC support for OMAP
- Other fixes and cleanups, and a few new device IDs
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Merge tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd
Pull mtd update from David Woodhouse:
- More robust parsing especially of xattr data in JFFS2
- Updates to mxc_nand and gpmi drivers to support new boards and device tree
- Improve consistency of information about ECC strength in NAND devices
- Clean up partition handling of plat_nand
- Support NAND drivers without dedicated access to OOB area
- BCH hardware ECC support for OMAP
- Other fixes and cleanups, and a few new device IDs
Fixed trivial conflict in drivers/mtd/nand/gpmi-nand/gpmi-nand.c due to
added include files next to each other.
* tag 'for-linus-3.5-20120601' of git://git.infradead.org/linux-mtd: (75 commits)
mtd: mxc_nand: move ecc strengh setup before nand_scan_tail
mtd: block2mtd: fix recursive call of mtd_writev
mtd: gpmi-nand: define ecc.strength
mtd: of_parts: fix breakage in Kconfig
mtd: nand: fix scan_read_raw_oob
mtd: docg3 fix in-middle of blocks reads
mtd: cfi_cmdset_0002: Slight cleanup of fixup messages
mtd: add fixup for S29NS512P NOR flash.
jffs2: allow to complete xattr integrity check on first GC scan
jffs2: allow to discriminate between recoverable and non-recoverable errors
mtd: nand: omap: add support for hardware BCH ecc
ARM: OMAP3: gpmc: add BCH ecc api and modes
mtd: nand: check the return code of 'read_oob/read_oob_raw'
mtd: nand: remove 'sndcmd' parameter of 'read_oob/read_oob_raw'
mtd: m25p80: Add support for Winbond W25Q80BW
jffs2: get rid of jffs2_sync_super
jffs2: remove unnecessary GC pass on sync
jffs2: remove unnecessary GC pass on umount
jffs2: remove lock_super
mtd: gpmi: add gpmi support for mx6q
...
This fixes a build failure with CONFIG_CACHE_L2X0=n:
arch/arm/mach-imx/built-in.o: In function `imx3_init_l2x0':
imx53-dt.c:(.init.text+0x190): undefined reference to `l2x0_init'
make[2]: *** [.tmp_vmlinux1] Error 1
make[1]: *** [sub-make] Error 2
make: *** [all] Error 2
When the l2 cache isn't enabled the quirk introduced in
9524705 (MX35: Fix bogus L2 cache settings) doesn't need to be done
either.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
The first argument of I2C_BOARD_INFO is used to assign .type, so drop
second assignment.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
