Commit graph

10 commits

Author SHA1 Message Date
Magnus Damm
ceb9b97451 sh: Hook up the SH-X3 SMP intc register groups.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 18:34:48 +09:00
Magnus Damm
5c37e02535 sh: intc - mark data structures as __initdata
With the intc core improved it is now possible to put the intc data
structures in the initdata section.

Version two of this patch puts the __initdata inside DECLARE_INTC_DESC()
and removes the __initdata included in the board specific r2d code.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
46420e49c9 sh: x3 - add ipi vectors
With the intc dual prio register support in place it is now possible
to add the ipi vectors to x3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:50 +09:00
Magnus Damm
6ef5fb2cfc sh: intc - add a clear register to struct intc_prio_reg
We need a secondary register member in struct intc_prio_reg to support
dual priority registers used by ipi on x3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Magnus Damm
d6aee69ca1 sh: x3 - fix setup_bootmem_node() compile error with shx3_defconfig
This makes sure the function prototype for setup_bootmem_node() gets
included. The file setup-shx3.c does not compile otherwise for
CONFIG_NUMA=n.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Paul Mundt
d3428e9101 sh: Wire up CSM node for SH-X3.
Now that NODES_SHIFT is bumped up, we can plug in the CSM block as
a separate node, too.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:49 +09:00
Paul Mundt
7da3b8ef66 sh: Initial multiple-node support for SH-X3.
Wire up CPU#0 URAM as node 1 on SH-X3.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
1ee010087e sh: intc - add support for x3
This patch converts the cpu specific interrupt setup code for x3 from
intc2 to intc. New vectors are also added to match the preliminary
information.

Use plat_irq_setup_pins() to select between IRQ and IRL mode for IRQ0-3.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-09-21 11:57:47 +09:00
Magnus Damm
90015c8938 sh: IPR/INTC2 IRQ setup consolidation.
This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-07-20 12:18:20 +09:00
Paul Mundt
2b1bd1ac5d sh: Preliminary support for the SH-X3 CPU.
This adds basic support for UP SH-X3.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-06-20 18:27:10 +09:00