2 commits

Author	SHA1	Message	Date
Catalin Marinas	a904f5f9eb	ARM: 6870/1: The mandatory barrier rmb() must be a dsb() in for device accesses ... Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>	2011-05-12 10:52:00 +01:00
Catalin Marinas	2503a5ecd8	ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220 ... RealView boards with certain revisions of the L220 cache controller (ARM11* processors only) may have issues (hardware deadlock) with the recent changes to the mb() barrier implementation (DSB followed by an L2 cache sync). The patch redefines the RealView ARM11MPCore mandatory barriers without the outer_sync() call. Cc: <stable@kernel.org> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>	2010-07-02 10:10:09 +01:00