Commit graph

59 commits

Author SHA1 Message Date
Arnd Bergmann
1194b152cd Merge branch 'tegra/soc' into next/drivers
This is a dependency for the tegra/clk branch.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Conflicts:
	drivers/clocksource/tegra20_timer.c
2013-04-09 17:07:36 +02:00
Joseph Lo
7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00
Laxman Dewangan
57471c8d3c ARM: tegra: fix register address of slink controller
Fix typo on register address of slink3 controller where register
address is wrongly set as 0x7000d480 but it is 0x7000d800.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-03-22 21:30:16 +01:00
Peter De Schrijver
6f88fb8af6 clocksource: tegra: move to of_clk_get
The new clockframework introduced DT IDs for each clock. To be able to remove
the device registrations, this driver needs to be updated to use the DT IDs.
Note that the actual removal of the clk_register_clkdev() calls will be done
in a later series.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:29:43 -06:00
Prashant Gaikwad
ed3ced3711 ARM: Tegra: Add clock entry for smp_twd clock
As DT support for clocks and smp_twd is enabled, add clock entry
for smp_twd clock to DT.

This fixes the following error while booting the kernel:
smp_twd: clock not found -2

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: include kernel log spew that this fixes]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-03-04 17:16:36 -08:00
Stephen Warren
8364f5d965 ARM: tegra: remove clock-frequency properties from serial nodes
Currently, the serial nodes define both a clock-frequency and a clocks
property. We should not provide both, since they might conflict.

In practice, this also causes problems since the of_serial driver uses
the clock-frequency property in preference to the clocks property, and
hence doesn't clk_prepare_enable() the clock, which may then leave it
with no known users, and hence the common clock framework will disable
it, thus breaking the port, which is usually the console.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-02-13 11:17:02 -07:00
Hiroshi Doyu
109269e878 ARM: dt: tegra20: Rename "gart" to "iommu"
Use functional name for DT entry instead of h/w name.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 10:58:58 -07:00
Lucas Stach
ab343e91aa ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Laxman Dewangan
699ed4b94c ARM: tegra: add DT entry for KBC controller
NVIDIA's Tegra SoCs have the matrix keyboard controller which
supports 16x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: added clocks property]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Stephen Warren
bb2c1de9ff ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
This ensures nodes are sorted in order of reg address. This makes it
easier to compare against e.g. the U-Boot device trees, and is simply
consistent and clean.

While we're at it, remove the unit address from the cache-controller
node name, since it's unique without it.

Reported-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Lucas Stach
0698ed1986 ASoC: tegra: add ac97 host controller to device tree
Add default entry for the AC97 host controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan
b6551bb933 ARM: tegra: dts: add aliases and DMA requestor for serial controller
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible nvidia,tegra20-uart
and APB DMA based driver will get enabled with compatible
nvidia,tegra20-hsuart.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Stephen Warren
ee05948517 Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114
Conflicts:
	arch/arm/mach-tegra/platsmp.c
2013-01-28 11:22:46 -07:00
Stephen Warren
540fc9d971 ARM: tegra: add clocks properties to USB PHY nodes
The patch to add USB PHY nodes to device tree was written before Tegra
supported the clocks property in device tree. Now that it does, add the
required clocks properties to these nodes.

This will allow all clk_get_sys() calls in tegra_usb_phy.c to be replaced
by clk_get(phy->dev, clock_name), as part of converting the PHY driver to
a platform driver.

Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Venu Byravarasu
e374b65c9b ARM: tegra: add DT nodes for Tegra USB PHY
Add DT nodes for Tegra USB PHY along with related documentation.
Also added a phandle property to controller DT node, for referring
to connected PHY instance.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Venu Byravarasu
b4e074788a ARM: tegra: Add new DT property to USB node.
As Tegra USB host driver is using instance number for resetting
PORT0 twice, adding a new DT property for handling this.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Prashant Gaikwad
8d8b43dae3 ARM: tegra: add clock properties to Tegra20 DT
Add clock information to device nodes.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Stephen Warren
270f8ce312 ARM: tegra: define Tegra20 CAR binding
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of
most clocks within Tegra20. The device tree binding models this as a
single monolithic clock provider, which exports many clocks. This reduces
the number of nodes needed in device tree to represent these clocks.

This binding is only useful for Tegra20; the set of clocks that exists on
Tegra30 is sufficiently different to merit its own binding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
[pgaikwad: Added mux clk ids and sorted CAR node]
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Hiroshi Doyu
4dd2bd3736 ARM: tegra: Add CPU nodes to Tegra20 device tree
Add CPU node for Tegra20.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:41 -07:00
Stephen Warren
73368ba0e1 ARM: tegra: add TWD to device tree
This will allow timer.c to use twd_local_timer_of_register(), and
hence not need to hard-code the TWD address or IRQ.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Stephen Warren
380e04ac2c ARM: tegra: define DT bindings for and instantiate RTC
The Tegra RTC maintains seconds and milliseconds counters, and five alarm
registers. The alarms and other interrupts may wake the system from
low-power state.

Define a DT binding for this HW module, and add the module into the Tegra
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Stephen Warren
2f2b7fb202 ARM: tegra: define DT bindings for and instantiate timer
The Tegra timer provides a number of 29-bit timer channels, a single
32-bit free running counter, and in the Tegra30 variant, 5 watchdog modules.
The first two channels may also trigger a legacy watchdog reset.

Define a DT binding for this HW module, and add the module into the Tegra
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16 12:22:16 -07:00
Thierry Reding
ed821f0709 ARM: tegra: Add Tegra20 host1x support
Add the host1x node along with its children to the Tegra20 DTSI. Board-
specific DTS files are expected to enable the available outputs and
complement the device tree with data specific to the hardware.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:30 -07:00
Laxman Dewangan
fa98a114bf ARM: tegra: dts: add sflash controller dt entry
Nvidia's Tegra20 have the SPI (SFLASH) controller to
interface with spi flash device which is used for system
boot. Add DT entry for this controller.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: move sflash node to keep file sorted]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:30 -07:00
Laxman Dewangan
a86b0db3c0 ARM: tegra: dts: add slink controller dt entry
Add slink controller details in the dts file of
Tegra20 and Tegra30.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:29 -07:00
Joseph Lo
5ab134ad09 ARM: tegra: dt: add L2 cache controller
Add L2 cache controller binding into DT for Tegra.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05 11:36:23 -07:00
Stephen Warren
bbfc33bde9 ARM: tegra: fix invalid unit-address in tegra*.dtsi
Unit addresses, whilst written in hex, don't contain a 0x prefix.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-10-07 07:02:06 -07:00
Thierry Reding
2b8b15da66 ARM: tegra: dts: Add pwm label
PWM devices can be referenced in the DT by phandle and per-chip index.
In order for this to work properly, the PWM controller needs to have a
label attached to it.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-20 09:33:59 -06:00
Linus Torvalds
9ec97169e7 Merge branch 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm
Pull PWM subsystem from Thierry Reding:
 "The new PWM subsystem aims at collecting all implementations of the
  legacy PWM API and to eventually replace it completely.

  The subsystem has been in development for over half a year now and
  many drivers have already been converted.  It has been in linux-next
  for a couple of weeks and there have been no major issues so I think
  it is ready for inclusion in your tree."

Arnd Bergmann <arnd@arndb.de>:
 "Very much Ack on the new subsystem.  It uses the interface
  declarations as the previously separate pwm drivers, so nothing
  changes for now in the drivers using it, although it enables us to
  change those more easily in the future if we want to.

  This work is also one of the missing pieces that are required to
  eventually build ARM kernels for multiple platforms, which is
  currently prohibited (amongs other things) by the fact that you cannot
  have more than one driver exporting the pwm functions."

Tested-and-acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Philip, Avinash <avinashphilip@ti.com> # TI's AM33xx platforms
Acked-By: Alexandre Pereira da Silva <aletes.xgr@gmail.com> # LPC32XX
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sachin Kamat <sachin.kamat@linaro.org>

Fix up trivial conflicts with other cleanups and DT updates.

* 'for-3.6' of git://gitorious.org/linux-pwm/linux-pwm: (36 commits)
  pwm: pwm-tiehrpwm: PWM driver support for EHRPWM
  pwm: pwm-tiecap: PWM driver support for ECAP APWM
  pwm: fix used-uninitialized warning in pwm_get()
  pwm: add lpc32xx PWM support
  pwm_backlight: pass correct brightness to callback
  pwm: Use pr_* functions in pwm-samsung.c file
  pwm: Convert pwm-samsung to use devm_* APIs
  pwm: Convert pwm-tegra to use devm_clk_get()
  pwm: pwm-mxs: Return proper error if pwmchip_remove() fails
  pwm: pwm-bfin: Return proper error if pwmchip_remove() fails
  pwm: pxa: Propagate pwmchip_remove() error
  pwm: Convert pwm-pxa to use devm_* APIs
  pwm: Convert pwm-vt8500 to use devm_* APIs
  pwm: Convert pwm-imx to use devm_* APIs
  pwm: Conflict with legacy PWM API
  pwm: pwm-mxs: add pinctrl support
  pwm: pwm-mxs: use devm_* managed functions
  pwm: pwm-mxs: use global reset function stmp_reset_block
  pwm: pwm-mxs: encode soc name in compatible string
  pwm: Take over maintainership of the PWM subsystem
  ...
2012-07-30 09:22:37 -07:00
Thierry Reding
140fd977dc pwm: tegra: Add device tree support
Add auxdata to instantiate the PWFM controller from a device tree,
include the corresponding nodes in the dtsi files for Tegra 20 and
Tegra 30 and add binding documentation.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-07-02 21:38:59 +02:00
Roland Stigge
223ef78d04 ARM: tegra: Fix dts files w/ status property: "disable" -> "disabled"
This patches fixes some status = "disable" strings to "disabled", the correct
way of disabling nodes in the devicetree.

Just the tegra part here. Everything else goes via other patches and trees.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20 12:30:34 -06:00
hdoyu@nvidia.com
bfb3fe1266 ARM: dt: tegra20: Rename "emc" to "memory-controller"
Use a more plain english name.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[swarren: also rename the node in tegra-seaboard.dts]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-11 11:48:42 -06:00
hdoyu@nvidia.com
a9140aa51d ARM: dt: tegra{20,30}.dtsi: Rename "mc" to "memory-controller"
Use a more plain english name.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
[swarren: remove redundant unit address from tegra30.dtsi change]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-11 11:48:40 -06:00
Stephen Warren
2a5fdc9add ARM: dt: tegra: invert status=disable vs status=okay
In tegra*.dtsi, set status="disable" for all HW modules that the board
design may choose not to use. Update all boards to specifically enable
any of those modules that are useful by setting status="okay".

This makes board files say which features they do use, rather than which
they don't, which feels more logical. It also makes the .dts files
slightly smaller, at least for existing content.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:23 -06:00
Stephen Warren
2eaab06ea6 ARM: dt: tegra: consistent basic property ordering
Put properties in order compatible, reg, interrupts, then anything else
the node has.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:19 -06:00
Stephen Warren
c04abb3a07 ARM: dt: tegra: sort nodes based on bus order
Sort the nodes according to the following rules:
* First, any overrides for properties or nodes created by included files,
  in the order they appeared in the include file.
* Second, any nodes with a reg property, in numerical order.
* Third, any nodes without a reg property, in alphabetical order of node
  name.

The second sorting rule at least will probably help if/when we need to
explicitly insert nodes for the various busses in Tegra; that will just
be an indentation change rather than also a node re-ordering.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:15 -06:00
Stephen Warren
ba04c289bc ARM: dt: tegra: consistenly use lower-case for hex constants
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:09 -06:00
Stephen Warren
5ff488875b ARM: dt: tegra: format regs properties consistently
Place each reg "entry" on its own line, and wrap the whole list in
<> rather than each individual entry.

The convention chosen here is slightly arbitrary, but is not consistent
throughout all Tegra files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:06 -06:00
Stephen Warren
f9eb26a4e1 ARM: dt: tegra: remove unnecessary unit addresses
DT node names only need to include the unit address if it's required to
make the node name unique. Remove the unnecessary unit addresses.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:55:00 -06:00
Stephen Warren
95decf8474 ARM: dt: tegra: whitespace cleanup
Consistently don't place a space after < or before >.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
2012-05-14 10:54:55 -06:00
hdoyu@nvidia.com
6a943e0e13 ARM: dt: tegra20.dtsi: Add GART node
Add a node for the Tegra20 GART

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-14 10:51:55 -06:00
hdoyu@nvidia.com
4a82f2b38e ARM: dt: tegra20.dtsi: Add Memory Controller(MC) nodes
Add Tegra MC(Memory Controller) nodes for tegra20.dtsi.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-14 10:51:46 -06:00
Hiroshi DOYU
7868a9bcac ARM: dt: tegra: Add device tree support for AHB
Add AHB entry for tegra20/30.

Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-05-14 10:51:28 -06:00
Linus Torvalds
09893ee845 ARM: More device tree support updates
This branch contains a number of updates for device tree support on
 several ARM platforms, in particular:
 
 * AT91 continues the device tree conversion adding support for a number of
   on-chip drivers and other functionality
 * ux500 adds probing of some of the core SoC blocks through device tree
 * Initial device tree support for ST SPEAr600 platforms
 * kirkwood continues the conversion to device-tree probing
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Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: More device tree support updates" from Olof Johansson:
 "This branch contains a number of updates for device tree support on
  several ARM platforms, in particular:

   * AT91 continues the device tree conversion adding support for a
     number of on-chip drivers and other functionality
   * ux500 adds probing of some of the core SoC blocks through device
     tree
   * Initial device tree support for ST SPEAr600 platforms
   * kirkwood continues the conversion to device-tree probing"

Manually merge arch/arm/mach-ux500/Kconfig due to MACH_U8500 rename, and
drivers/usb/gadget/at91_udc.c due to header file include cleanups.

Also do an "evil merge" for the MACH_U8500 config option rename that the
affected RMI4 touchscreen driver in staging.  It's called MACH_MOP500
now, and it was missed during previous merges.

* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
  ARM: SPEAr600: Add device-tree support to SPEAr600 boards
  ARM: ux500: Provide local timer support for Device Tree
  ARM: ux500: Enable PL022 SSP Controller in Device Tree
  ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
  ARM: ux500: Enable PL011 AMBA UART Controller for Device Tree
  ARM: ux500: Enable Cortex-A9 GIC (Generic Interrupt Controller) in Device Tree
  ARM: ux500: db8500: list most devices in the snowball device tree
  ARM: ux500: split dts file for snowball into generic part
  ARM: ux500: combine the board init functions for DT boot
  ARM: ux500: Initial Device Tree support for Snowball
  ARM: ux500: CONFIG: Enable Device Tree support for future endeavours
  ARM: kirkwood: use devicetree for rtc-mv
  ARM: kirkwood: rtc-mv devicetree bindings
  ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0
  ARM: kirkwood: fdt: facilitate new boards during fdt migration
  ARM: kirkwood: fdt: absorb kirkwood_init()
  ARM: kirkwood: fdt: use mrvl ticker symbol
  ARM: orion: wdt: use resource vice direct access
  ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.
  ARM: orion: spi: remove enable_clock_fix which is not used
  ...
2012-03-28 12:34:33 -07:00
Linus Torvalds
66f03c614c ARM: device tree work
Most of these patches convert code from using static platform data to
 describing the hardware in the device tree. This is only the first
 half of the changes for v3.4 because a lot of patches for this topic
 came in the last week before the merge window.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: device tree work" from Arnd Bergmann:
 "Most of these patches convert code from using static platform data to
  describing the hardware in the device tree.  This is only the first
  half of the changes for v3.4 because a lot of patches for this topic
  came in the last week before the merge window.

  Signed-off-by: Arnd Bergmann <arnd@arndb.de>"

Fix up trivial conflicts in arch/arm/mach-vexpress/{Kconfig,core.h}

* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (86 commits)
  Document: devicetree: add OF documents for arch-mmp
  ARM: dts: append DTS file of pxa168
  ARM: mmp: append OF support on pxa168
  ARM: mmp: enable rtc clk in pxa168
  i2c: pxa: add OF support
  serial: pxa: add OF support
  arm/dts: mt_ventoux: very basic support for TeeJet Mt.Ventoux board
  ARM: OMAP2+: Remove extra ifdefs for board-generic
  ARM: OMAP2+: Fix build error when only ARCH_OMAP2/3 or 4 is selected
  ASoC: DT: Add digital microphone binding to PAZ00 board.
  ARM: dt: Add ARM PMU to tegra*.dtsi
  ARM: at91: at91sam9x5cm/dt: add leds support
  ARM: at91: usb_a9g20/dt: add gpio-keys support
  ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support
  ARM: at91: at91sam9m10g45ek/dt: add leds support
  ARM: at91: usb_a9g20/dt: add leds support
  ARM: at91/pio: add new PIO3 features
  ARM: at91: add sam9_smc.o to at91sam9x5 build
  ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter
  ARM: at91/tc: add device tree support to atmel_tclib
  ...
2012-03-27 16:47:35 -07:00
Simon Glass
ba202f15cd arm: tegra: dts: Add legacy mode support to Tegra2x USB1 port
Tegra's USB1 port supports legacy mode, so mark it as such. Even if we
don't use it, we must turn it off in the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-07 14:36:52 -08:00
Stephen Warren
583553b28c ARM: dt: Add ARM PMU to tegra*.dtsi
This enables HW performance measurements, and usage of the "perf" tool.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-03-04 10:41:57 -08:00
Stephen Warren
6f74dc9bc8 gpio: tegra: Dynamically allocate IRQ base, and support DT
Enhance the driver to dynamically allocate the base IRQ number, and
create an IRQ domain for itself. The use of an IRQ domain ensures that
any device tree node interrupts properties are correctly parsed.

Describe interrupt-related properties in the device tree binding docs,
and the contents of "child" node interrupts property.

Update tegra*.dtsi to specify the required interrupt-related properties.

Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer
gives correct results since the IRQ numbers for GPIOs are dynamically
allocated.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:25:00 -08:00
Stephen Warren
d17adfdb17 ARM: dt: Add binding for Tegra PMC
The Tegra PMC (Power Management Controller) interfaces with an external
PMU (Power Management Unit), and controls wake-up from sleep modes.

This initial binding is the bare minimum required to control the PMC's
inversion of the PMU's interrupt signal.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:21 -08:00
Stephen Warren
c404af0a16 ARM: dt: tegra: Add labels for I2S controllers
This will allow the sound node to refer to the I2S controllers by name
when creating phandles.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-02-06 18:21:21 -08:00