Techwizz/kernel-fxtec-pro1x
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2 commits

Author SHA1 Message Date
Atsushi Nemoto
a2c2bc4b26 [MIPS] MIPS32/MIPS64 S-cache fix and cleanup 
Use blast_scache_range, blast_inv_scache_range for mips32/mips64 scache
routine.  Also initialize waybit for MIPS32/MIPS64 S-cache.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-06-29 21:10:54 +01:00
Chris Dearman
9318c51acd [MIPS] MIPS32/MIPS64 secondary cache management 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-06-29 21:10:52 +01:00