I've seen users getting very confused by the WARN_ON()s for can_sleep
GPIOs in the atomic-safe paths, the discoverability of the non-atomic
version of the API seems to be hampered by the fact that it's defined
in a header file not the .c file where the warnings are.
Add a couple of comments next to the warnings to help people on their
way.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Adding support for the open source gpio on which client
can specify the open source property through GPIO flag
GPIOF_OPEN_SOURCE at the time of gpio request.
The open source pins are normally pulled low and it
cannot be driven to output with value of 0 and so
when client request for setting the pin to LOW, the
gpio will be set to input direction to make pin in tristate
and hence PULL-DOWN on pins will make the state to LOW.
The open source pin can be driven to HIGH by setting output
with value of 1.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Adding support for the open drain gpio on which client
can specify the open drain property through GPIO flag
GPIOF_OPEN_DRAIN at the time of gpio request.
The open drain pins are normally pulled high and it
cannot be driven to output with value of 1 and so
when client request for setting the pin to HIGH, the
gpio will be set to input direction to make pin in tristate
and hence PULL-UP on pins will make the state to HIGH.
The open drain pin can be driven to LOW by setting output
with value of 0.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Tegra SoC driver support.
Some device tree conversions, some new drivers. and a fix for an issue
introduced in Grant Likely's irq_domain conversion in his tree. Because
of that, this branch depends on his branch to build (but not to merge):
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
* tag 'tegra-soc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: (34 commits)
ARM: tegra: uncompress.h: Don't depend on kernel headers
gpio: tegra: Fix build issue due to irq_domain rework.
ARM: tegra: Remove duplicate PMU interrupt inversion code
ARM: tegra: Add a simple PMC driver
ARM: tegra: dma: not required to move requestor when stopping.
ARM: tegra: Fix EMC pdata initialization from registers
gpio: tegra: Parameterize the number of banks
gpio: tegra: Dynamically allocate IRQ base, and support DT
ARM: tegra: Remove use of TEGRA_GPIO_TO_IRQ
ARM: tegra: Pass uncompress.h UART selection to DEBUG_LL
ARM: tegra: uncompress.h: Choose a UART at runtime
ARM: tegra: uncompress.h: Store UART address in a variable
ARM: tegra: Introduce define DEBUG_UART_SHIFT
ARM: tegra: Support Tegra30 in decompressor UART setup
ARM: tegra: Pause DMA when reading transfer count
ARM: tegra: emc: device tree support
ARM: tegra: emc: convert tegra2_emc to a platform driver
ARM: tegra: fuse: add bct strapping reading
ARM: tegra: fuse: add functions to access chip revision
ARM: tegra: fuse: use apbio dma for register access
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/mach-omap1/gpio16xx.c
drivers/gpio/gpio-omap.c
Merge in the runtime-pm-cleanup branch from the gpio tree into
next/cleanup, this resolves a nonobvious merge conflict between
the two branches. Both branches move parts of the gpio-omap
driver into platform code, this takes the superset of both
changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit 7da5a66 "irq_domain: Remove 'new' irq_domain in favour of the
ppc one" changed the set of available irq domain APIs. Update the Tegra
GPIO driver to account for those changes, to solve a build break.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This way we can remove omap_read/write call from the GPIO driver
and remove include to linux/io.h.
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
pl061 uses same routines for suspend/freeze/poweroff and resume/thaw/restore.
We are only saving and restoring register values on these routines.
During hibernation, in freeze() we take a snapshot of gpio registers. In thaw()
we don't actually need to restore these registers, as power was never shut down
till now. Similarly, in poweroff() we don't need to take snapshot of these
registers again, as it was done during freeze() and by now the image is already
saved on disk.
This patch passes poweroff() and thaw() routines as NULL to avoid this extra
work done.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch converts a number of the powerpc drivers to use the common library
of irq_domain xlate functions, dropping a bunch of lines in the process.
v5: - Remove tsi108 changes from patch
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Milton Miller <miltonm@bga.com>
Tested-by: Olof Johansson <olof@lixom.net>
Each revmap type has different arguments for setting up the revmap.
This patch splits up the generator functions so that each revmap type
can do its own setup and the user doesn't need to keep track of how
each revmap type handles the arguments.
This patch also adds a host_data argument to the generators. There are
cases where the host_data pointer will be needed before the function returns.
ie. the legacy map calls the .map callback for each irq before returning.
v2: - Add void *host_data argument to irq_domain_add_*() functions
- fixed failure to compile
- Moved IRQ_DOMAIN_MAP_* defines into irqdomain.c
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Milton Miller <miltonm@bga.com>
Tested-by: Olof Johansson <olof@lixom.net>
This patch drops the powerpc-specific irq_host structures and uses the common
irq_domain strucutres defined in linux/irqdomain.h. It also fixes all
the users to use the new structure names.
Renaming irq_host to irq_domain has been discussed for a long time, and this
patch is a step in the process of generalizing the powerpc virq code to be
usable by all architecture.
An astute reader will notice that this patch actually removes the irq_host
structure instead of renaming it. This is because the irq_domain structure
already exists in include/linux/irqdomain.h and has the needed data members.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Milton Miller <miltonm@bga.com>
Tested-by: Olof Johansson <olof@lixom.net>
Tegra20's GPIO controller has 7 banks, and Tegra30's controller has 8
banks. Allow the number of banks to be configured at run-time by the
device tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enhance the driver to dynamically allocate the base IRQ number, and
create an IRQ domain for itself. The use of an IRQ domain ensures that
any device tree node interrupts properties are correctly parsed.
Describe interrupt-related properties in the device tree binding docs,
and the contents of "child" node interrupts property.
Update tegra*.dtsi to specify the required interrupt-related properties.
Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer
gives correct results since the IRQ numbers for GPIOs are dynamically
allocated.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
GPIO IP revisions such as those used in OMAP4 have a set_dataout
while the previous revisions used a single dataout register.
Depending on what is available restore the dataout settings
to the right register.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Setup the dataout register before restoring OE. This is to make
sure that we have valid data in dataout register which would be
made available in output pins as soon as OE is enabled. Else,
there is risk of unknown data getting out into gpio pins.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Setup the interrupt enable registers only after we have configured the
required edge and required configurations, not before, to prevent
spurious events as part of restore routine.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
GPIO debounce registers need to be saved and restored for proper functioning
of driver.
Signed-off-by: Nishanth Menon <nm@ti.com>
tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce()
as part of dynamic context save to remove overhead.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Context is now saved dynamically in respective functions whenever and
whichever registers are modified. This avoid overhead of saving all
registers context in the runtime suspend callback.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Enable debounce clock before writing/reading debounce registers.
Disable the clock at the end so that it is synchronized with the
pm_runtime_get/put_sync calls.
Enable debounce clock per module. This call is mandatory because
in omap_gpio_request() when *_runtime_get_sync() is called,
_gpio_dbck_enable() within runtime callbck fails to turn on dbck
because dbck_enable_mask used within _gpio_dbck_enable() is still
not initialized at that point. Therefore we have to enable dbck here.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The dbck_enable_mask indicates which all GPIOs within a bank have debounce
enabled and dbck is enabled/disabled based upon this. But there is no
mechanism to track the dbck state. In order to manage the dbck state we need
additional flag and logic so that turning off/on dbck is synchronized with
pm_runtime_put/get_sync calls.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Since *_prepare_for_idle() and *_resume_after_idle() are called
with interrupts disabled they should be kept as simple as possible.
So, moving most of the stuff to *_runtime_suspend/resume() callbacks.
To avoid invalid context restore happening in *_runtime_resume()
callback as a result of *_get_sync() call in *_gpio_probe(), update
bank->context_loss_count. This would make context restore condition
check false in the callback and skip restore until further
initialization take place. The workaround_enabled static variable
is now a member of struct gpio_bank.
Unlike most GPIO registers the OE has 0xffffffff as the default value.
To make sure invalid context is not restored, updating the OE context
with default value.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
There is no need to operate on all the banks every time the function is called.
Just operate on the current bank passed by the framework.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put()
for enabling/disabling clocks appropriately. Remove syscore_ops and
instead use SET_RUNTIME_PM_OPS macro.
There is no more need to call omap_device_disable_idle_on_suspend
since driver is PM runtime adapted now.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they
need to be handled separately. Identify the same using a flag and remove all
METHOD_* macros.
mpuio_init() function is defined under #ifdefs. It is required only in case
of MPUIO bank type and only when PM operations are supported by it.
This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type.
For all the other cases it is a dummy function. Hence clean up the same
and remove all the OMAP SoC specific #ifdefs.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Remove un-necessary bit masking. Since the register are 4 byte aligned
and readl would work as is. The 'enabled' mask is already taking care
to mask for bank width.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
With register offsets now defined for respective OMAP versions we can get rid
of cpu_class_* checks. This function now has common initialization code for
all OMAP versions. Initialization specific to OMAP16xx has been moved within
omap16xx_gpio_init().
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Getting rid of ifdefs within the function by adding register offset intctrl
and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files.
Also, use wkup_status register consistently instead of referring to wakeup
clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in
set_gpio_trigger() using irqctrl.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
It is not required to use hard-coded offsets any more in context save and
restore functions and instead use the generic offsets which have been correctly
initialized during device registration.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
By adding level and edge detection register offsets and then initializing them
correctly according to OMAP versions during device registrations we can now remove
lot of revision checks in these functions.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Wakeup enable register offset initialized according to OMAP versions
during device registration. Use this to avoid version checks.
Starting with OMAP4, legacy registers should not be used in combination
with the updated regsiters. Use wkup_en register consistently for
all SoCs wherever applicable.
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio
request/free.
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making
non_wakeup_gpios as part of pdata.
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions
to handle save context & restore context respectively in the OMAP GPIO driver
itself instead of calling these functions from pm specific files.
For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in
gpio_resume_after_idle() call it again. If the count is different, do restore
context.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Currently gpio_context array used to save gpio bank's context, is used only for
OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it
can be specific to each gpio bank and can be used for any OMAP architecture
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1
is in wakeup domain. Instead of identifying bank's power domain by bank id,
use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context()
during dev_init.
For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used.
omap_device_get_pwrdm() could not be used as the pwrdm information needs to be
filled in pdata, whereas omap_device_get_pwrdm() could be used only after
omap_device_build() call.
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this
dependency from the driver by using list. Also remove the dependency on array of
pointers to gpio_bank struct of all GPIO devices.
Signed-off-by: Charulatha V <charu@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The device tps65910/tps65911 supports the sleep
functionality in some of gpios. If gpio is configured
in output mode and sleep is enabled then during device
sleep state, the output of gpio becomes LOW regardless
of non-sleep output value.
Such gpio can be used to control regulator switch such
that output of regulator is off in device sleep state.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Sodaville has GPIO controller behind the PCI bus. To my suprissed it is
not the same as on PXA.
The interrupt & gpio chip can be referenced from the device tree like
from any other driver. Unfortunately the driver which uses the gpio
interrupt has to use irq_of_parse_and_map() instead of
platform_get_irq(). The problem is that the platform device (which is
created from the device tree) is most likely created before the
interrupt chip is registered and therefore irq_of_parse_and_map() fails.
In theory the driver works as module. In reality most of the irq
functions are not exported to modules and it is possible that _this_
module is unloaded while the provided irqs are still in use.
Signed-off-by: Hans J. Koch <hjk@linutronix.de>
[torbenh@linutronix.de: make it work after the irq namespace cleanup,
add some device tree entries.]
Signed-off-by: Torben Hohn <torbenh@linutronix.de>
[bigeasy@linutronix.de: convert to generic irq & gpio chip]
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
[grant.likely@secretlab.ca: depend on x86 to avoid irq_domain breakage]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This bug was introduced by commit 54be5663
"gpio-ml-ioh: Support interrupt function" which adds a spinlock to struct
ioh_gpio but never init the spinlock.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This bug was introduced by commit d568a681
"gpio-pch: add spinlock in suspend/resume processing"
which adds a spinlock to struct pch_gpio but never init the spinlock.
Reported-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Commit 15c9a0acc3 (of: create of_phandle_args to simplify return of phandle
parsing data) modifies the parameter list of of_xlate function pointer declaration
in gpio_chip. Adapt the gpio specifier translate function for this change.
Reported-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Tested-by: Karol Lewandowski <k.lewandowsk@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
we only use the gpio function of mc9s08dz60 mcu chip, so just
add the gpio driver, as this mcu will never be used in other board.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
In preparation to make mach/irqs.h optional and remove from asm/irq.h,
directly include mach/irq.h to get MMP_GPIO_TO_IRQ and PXA_GPIO_TO_IRQ.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
One of the GPIO names in drivers/gpio/gpio-lpc32xx.c
was bad. Renaming gpi000 -> gpio00
Signed-off-by: Roland Stigge <stigge@antcom.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Using the correct gpio offset for setting the initial value
of gpio when setting output direction.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This driver does an unconditional read of io space during module init which
causes a bad dereference on ARM. It looks to me like this is an x86 only
drivers, so restrict it to only compile on x86.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Denis Turischev <denis@compulab.co.il>
The __iomem annotation is to be used together with pointers used
in iowrite32() but not for pointers returned by kzalloc().
For more details see [1] and [2].
This patch will remove the following sparse warning (i.e. when
copiling with "make C=1"):
* warning: incorrect type in assignment (different address spaces)
References:
[1] A new I/O memory access mechanism (Sep 15, 2004)
http://lwn.net/Articles/102232/
[2] Being more anal about iospace accesses (Sep 15, 2004)
http://lwn.net/Articles/102240/
Signed-off-by: Márton Németh <nm127@freemail.hu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch will remove the following sparse warning ("make C=1"):
* warning: Using plain integer as NULL pointer
Signed-off-by: Márton Németh <nm127@freemail.hu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The __iomem annotation is to be used together with pointers used
as iowrite32() parameter. For more details see [1] and [2].
This patch will remove the following sparse warnings ("make C=1"):
* warning: incorrect type in assignment (different address spaces)
* warning: incorrect type in argument 1 (different address spaces)
* warning: incorrect type in argument 2 (different address spaces)
References:
[1] A new I/O memory access mechanism (Sep 15, 2004)
http://lwn.net/Articles/102232/
[2] Being more anal about iospace accesses (Sep 15, 2004)
http://lwn.net/Articles/102240/
Signed-off-by: Márton Németh <nm127@freemail.hu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This patch will remove the following sparse warning ("make C=1"):
* warning: Using plain integer as NULL pointer
Signed-off-by: Márton Németh <nm127@freemail.hu>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
The existing gpio_to_irq() implementation on sa1100 only translates
validly for internal GPIOs. Since this sub-arch enables GPIOLIB
support, this results in buggy translations for non-internal GPIOs.
Get rid of the private gpio_to_irq() implementation, replacing it
with the .to_irq method in the sa1100 gpio chip instead.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (59 commits)
rtc: max8925: Add function to work as wakeup source
mfd: Add pm ops to max8925
mfd: Convert aat2870 to dev_pm_ops
mfd: Still check other interrupts if we get a wm831x touchscreen IRQ
mfd: Introduce missing kfree in 88pm860x probe routine
mfd: Add S5M series configuration
mfd: Add s5m series irq driver
mfd: Add S5M core driver
mfd: Improve mc13xxx dt binding document
mfd: Fix stmpe section mismatch
mfd: Fix stmpe build warning
mfd: Fix STMPE I2c build failure
mfd: Constify aat2870-core i2c_device_id table
gpio: Add support for stmpe variant 801
mfd: Add support for stmpe variant 801
mfd: Add support for stmpe variant 610
mfd: Add support for STMPE SPI interface
mfd: Separate out STMPE controller and interface specific code
misc: Remove max8997-muic sysfs attributes
mfd: Remove unused wm831x_irq_data_to_mask_reg()
...
Fix up trivial conflict in drivers/leds/Kconfig due to addition of
LEDS_MAX8997 and LEDS_TCA6507 next to each other.
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (31 commits)
pinctrl: remove unnecessary max pin number
pinctrl: correct a offset while enumerating pins
pinctrl: some typo fixes
pinctrl: rename U300 and SIRF pin controllers
pinctrl: pass name instead of device to pin_config_*
pinctrl: add "struct seq_file;" to pinconf.h
pinctrl: conjure names for unnamed pins
pinctrl: add a group-specific hog macro
pinctrl: don't create a device for each pin controller
arm/u300: don't use PINMUX_MAP_PRIMARY*
pinctrl: implement PINMUX_MAP_SYS_HOG
pinctrl: add a pin config interface
pinctrl/coh901: driver to request its pins
pinctrl: u300-pinmux: register proper GPIO ranges
pinctrl: move the U300 GPIO driver to pinctrl
ARM: u300: localize GPIO assignments
pinctrl: make it possible to add multiple maps
pinctrl: make a copy of pinmux map
pinctrl: GPIO direction support for muxing
pinctrl: print pin range in GPIO range debugs
...
Again, a lot of platforms have changes in here: pxa, samsung, omap,
at91, imx, ...
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Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Driver specific changes
Again, a lot of platforms have changes in here: pxa, samsung, omap,
at91, imx, ...
* tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
ARM: sa1100: clean up of the clock support
ARM: pxa: add dummy clock for sa1100-rtc
RTC: sa1100: support sa1100, pxa and mmp soc families
RTC: sa1100: remove redundant code of setting alarm
RTC: sa1100: Clean out ost register
Input: zylonite-wm97xx - replace IRQ_GPIO() with gpio_to_irq()
pcmcia: pxa: replace IRQ_GPIO() with gpio_to_irq()
ARM: EXYNOS: Modified files for SPI consolidation work
ARM: S5P64X0: Enable SDHCI support
ARM: S5P64X0: Add lookup of sdhci-s3c clocks using generic names
ARM: S5P64X0: Add HSMMC setup for host Controller
ARM: EXYNOS: Add USB OHCI support to ORIGEN board
USB: Add Samsung Exynos OHCI diver
ARM: EXYNOS: Add USB OHCI support to SMDKV310 board
ARM: EXYNOS: Add USB OHCI device
net: macb: fix build break with !CONFIG_OF
i2c: tegra: Support DVC controller in device tree
i2c: tegra: Add __devinit/exit to probe/remove
net/at91_ether: use gpio_is_valid for phy IRQ line
ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT
...
Both platforms had some initial device tree support, but this adds
much more to actually make it usable.
This is where the really nasty conflicts in the samsung platform
start, due to some files getting moved around and combined in the
'restart' branch that has already gone into mainline through
Russell's tree.
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Device tree conversions for samsung and tegra
Both platforms had some initial device tree support, but this adds
much more to actually make it usable.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN
ARM: EXYNOS: Add Exynos4 device tree enabled board file
rtc: rtc-s3c: Add device tree support
input: samsung-keypad: Add device tree support
ARM: S5PV210: Modify platform data for pl330 driver
ARM: S5PC100: Modify platform data for pl330 driver
ARM: S5P64x0: Modify platform data for pl330 driver
ARM: EXYNOS: Add a alias for pdma clocks
ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build
ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
DMA: PL330: Add device tree support
ARM: EXYNOS: Modify platform data for pl330 driver
DMA: PL330: Infer transfer direction from transfer request instead of platform data
DMA: PL330: move filter function into driver
serial: samsung: Fix build for non-Exynos4210 devices
serial: samsung: add device tree support
serial: samsung: merge probe() function from all SoC specific extensions
serial: samsung: merge all SoC specific port reset functions
ARM: SAMSUNG: register uart clocks to clock lookup list
serial: samsung: remove all uses of get_clksrc and set_clksrc
...
Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and
drivers/tty/serial/Kconfig both due to just adding code close to
changes.
STMPE801 is a GPIO expander. GPIO registers for 801 are slightly different from other
variants. This patch adds support for STMPE801 in stmpe gpio driver.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@st.com>
Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap: (36 commits)
mfd: Clearing events requires event registers to be writable for da9052-core
mfd: Fix annotations in da9052-core
gpiolib: Mark da9052 driver broken
mfd: Declare da9052_regmap_config for the bus drivers
MFD: DA9052/53 MFD core module add SPI support v2
MFD: DA9052/53 MFD core module
regmap: Add irq_base accessor to regmap_irq
regmap: Allow drivers to reinitialise the register cache at runtime
regmap: Add trace event for successful cache reads
regmap: Allow regmap_update_bits() users to detect changes
regmap: Report if we actually handled an interrupt in regmap-irq
regmap: Fix rbtreee build when not using debugfs
regmap: Provide debugfs dump of the rbtree cache data
regmap: Do debugfs init before cache init
regmap: Suppress noop writes in regmap_update_bits()
regmap: Remove indexed cache type
regmap: Drop check whether a register is readable in regcache_read
regmap: Properly round cache_word_size
regmap: Add support for 10/14 register formating
regmap: Try cached read before checking if a hardware read is possible
...
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (53 commits)
Kconfig: acpi: Fix typo in comment.
misc latin1 to utf8 conversions
devres: Fix a typo in devm_kfree comment
btrfs: free-space-cache.c: remove extra semicolon.
fat: Spelling s/obsolate/obsolete/g
SCSI, pmcraid: Fix spelling error in a pmcraid_err() call
tools/power turbostat: update fields in manpage
mac80211: drop spelling fix
types.h: fix comment spelling for 'architectures'
typo fixes: aera -> area, exntension -> extension
devices.txt: Fix typo of 'VMware'.
sis900: Fix enum typo 'sis900_rx_bufer_status'
decompress_bunzip2: remove invalid vi modeline
treewide: Fix comment and string typo 'bufer'
hyper-v: Update MAINTAINERS
treewide: Fix typos in various parts of the kernel, and fix some comments.
clockevents: drop unknown Kconfig symbol GENERIC_CLOCKEVENTS_MIGR
gpio: Kconfig: drop unknown symbol 'CS5535_GPIO'
leds: Kconfig: Fix typo 'D2NET_V2'
sound: Kconfig: drop unknown symbol ARCH_CLPS7500
...
Fix up trivial conflicts in arch/powerpc/platforms/40x/Kconfig (some new
kconfig additions, close to removed commented-out old ones)
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Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6
Changes queued in gpio/next for the start of the 3.3 merge window
* tag 'gpio-for-linus-20120104' of git://git.secretlab.ca/git/linux-2.6:
gpio: Add decode of WM8994 GPIO configuration
gpio: Convert GPIO drivers to module_platform_driver
gpio: Fix typo in comment in Samsung driver
gpio: Explicitly index samsung_gpio_cfgs
gpio: Add Linus Walleij as gpio co-maintainer
of: Add device tree selftests
of: create of_phandle_args to simplify return of phandle parsing data
gpio/powerpc: Eliminate duplication of of_get_named_gpio_flags()
gpio/microblaze: Eliminate duplication of of_get_named_gpio_flags()
gpiolib: output basic details and consolidate gpio device drivers
pch_gpio: Change company name OKI SEMICONDUCTOR to LAPIS Semiconductor
pch_gpio: Support new device LAPIS Semiconductor ML7831 IOH
spi/pl022: make the chip deselect handling thread safe
spi/pl022: add support for pm_runtime autosuspend
spi/pl022: disable the PL022 block when unused
spi/pl022: move device disable to workqueue thread
spi/pl022: skip default configuration before suspending
spi/pl022: fix build warnings
spi/pl022: only enable RX interrupts when TX is complete
* 'driver-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (73 commits)
arm: fix up some samsung merge sysdev conversion problems
firmware: Fix an oops on reading fw_priv->fw in sysfs loading file
Drivers:hv: Fix a bug in vmbus_driver_unregister()
driver core: remove __must_check from device_create_file
debugfs: add missing #ifdef HAS_IOMEM
arm: time.h: remove device.h #include
driver-core: remove sysdev.h usage.
clockevents: remove sysdev.h
arm: convert sysdev_class to a regular subsystem
arm: leds: convert sysdev_class to a regular subsystem
kobject: remove kset_find_obj_hinted()
m86k: gpio - convert sysdev_class to a regular subsystem
mips: txx9_sram - convert sysdev_class to a regular subsystem
mips: 7segled - convert sysdev_class to a regular subsystem
sh: dma - convert sysdev_class to a regular subsystem
sh: intc - convert sysdev_class to a regular subsystem
power: suspend - convert sysdev_class to a regular subsystem
power: qe_ic - convert sysdev_class to a regular subsystem
power: cmm - convert sysdev_class to a regular subsystem
s390: time - convert sysdev_class to a regular subsystem
...
Fix up conflicts with 'struct sysdev' removal from various platform
drivers that got changed:
- arch/arm/mach-exynos/cpu.c
- arch/arm/mach-exynos/irq-eint.c
- arch/arm/mach-s3c64xx/common.c
- arch/arm/mach-s3c64xx/cpu.c
- arch/arm/mach-s5p64x0/cpu.c
- arch/arm/mach-s5pv210/common.c
- arch/arm/plat-samsung/include/plat/cpu.h
- arch/powerpc/kernel/sysfs.c
and fix up cpu_is_hotpluggable() as per Greg in include/linux/cpu.h
* 'amba-modalias' of git://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
sound: aaci: Enable module alias autogeneration for AMBA drivers
watchdog: sp805: Enable module alias autogeneration for AMBA drivers
fbdev: amba: Enable module alias autogeneration for AMBA drivers
serial: pl011: Enable module alias autogeneration for AMBA drivers
serial: pl010: Enable module alias autogeneration for AMBA drivers
spi: pl022: Enable module alias autogeneration for AMBA drivers
rtc: pl031: Enable module alias autogeneration for AMBA drivers
rtc: pl030: Enable module alias autogeneration for AMBA drivers
mmc: mmci: Enable module alias autogeneration for AMBA drivers
input: ambakmi: Enable module alias autogeneration for AMBA drivers
gpio: pl061: Enable module alias autogeneration for AMBA drivers
dmaengine: pl330: Enable module alias autogeneration for AMBA drivers
dmaengine: pl08x: Enable module alias autogeneration for AMBA drivers
hwrng: nomadik: Enable module alias autogeneration for AMBA drivers
ARM: amba: Auto-generate AMBA driver module aliases during modpost
ARM: amba: Move definition of struct amba_id to mod_devicetable.h
This resolves the conflict in the arch/arm/mach-s3c64xx/s3c6400.c file,
and it fixes the build error in the arch/x86/kernel/microcode_core.c
file, that the merge did not catch.
The microcode_core.c patch was provided by Stephen Rothwell
<sfr@canb.auug.org.au> who was invaluable in the merge issues involved
with the large sysdev removal process in the driver-core tree.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Drivers should not have a dependency on NR_IRQS. Doing so may break with
SPARSE_IRQ enabled. As there are no in kernel users of the pl061 which
have multiple instances with their interrupts combined to a single parent
interrupt, remove this functionality. If this capability is needed later,
it could be supported more cleanly by just using a devicetree property.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Viresh Kumar <viresh.kumar@st.com>
Cc: Rajeev Kumar <rajeev-dlh.kumar@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Convert the pl061 irq_chip code to use the generic irq chip code.
This has the side effect of using 32-bit accesses rather than 8-bit
accesses to interrupt registers. The h/w TRM and testing seem to indicate
this is fine.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds 2 functions that allow managed devices to request GPIOs.
These GPIOs will then be managed by drivers/base/devres.c.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
We don't want drivers using NO_IRQ, so remove its use. For now, 0 or
-1 means no irq until platforms are converted to use 0.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.ml.walleij@gmail.com>
Use chained_irq_enter/exit helper functions instead of direct pointer
accesses. This is needed for generic irq chip conversion.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.ml.walleij@gmail.com>
This patch adds the suspend and resume operations in the driver. The patch
ensures the data save and restore for the device registers during the
suspend and resume operations respectively.
Signed-off-by: Deepak Sikri <deepak.sikri@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This driver will be converted to a dual GPIO + pinctrl driver
since it supports biasing and driving control options. Hopefully
it can serve as an example.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reimplement a call to devm_request_mem_region followed by a call to ioremap
or ioremap_nocache by a call to devm_request_and_ioremap.
The semantic patch that makes this transformation is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@nm@
expression myname;
identifier i;
@@
struct platform_driver i = { .driver = { .name = myname } };
@@
expression dev,res,size;
expression nm.myname;
@@
-if (!devm_request_mem_region(dev, res->start, size,
- \(res->name\|dev_name(dev)\|myname\))) {
- ...
- return ...;
-}
... when != res->start
(
-devm_ioremap(dev,res->start,size)
+devm_request_and_ioremap(dev,res)
|
-devm_ioremap_nocache(dev,res->start,size)
+devm_request_and_ioremap(dev,res)
)
... when any
when != res->start
// </smpl>
Signed-off-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
For the human reader.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Where appropriate factor out some boilerplate code for platform device
registration into module_platform_driver. Drivers that don't use the
standard module_init initcall haven't been converted.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Make it easier to follow the by number references into samsung_gpio_cfgs
by putting the indexes into the code initialising the array, improving
readability a bit. Ideally we wouldn't be using magic array indexes at all
but this is easier than coming up with a better way.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
As gpio chips get registered, a device tree node which represents the
gpio chip is searched and attached to it. A translate function is also
provided to convert the gpio specifier into actual platform settings
for pin function selection, pull up/down and driver strength settings.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
[kgene.kim@samsung.com: fixed build error]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The sysdev.h file should not be needed by any in-kernel code, so remove
the .h file from these random files that seem to still want to include
it.
The sysdev code will be going away soon, so this include needs to be
removed no matter what.
Cc: Jiandong Zheng <jdzheng@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Cc: Haavard Skinnemoen <hskinnemoen@gmail.com>
Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: "Venkatesh Pallipadi
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Kay Sievers <kay.sievers@vrfy.org>
This patch is functionally tested on Samsung SMDKV6410.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: David Dajun Chen <dchen@diasemi.com>
Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
[grant.likely: don't create an unnecessary header file]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Add a 5121-custom reject if an input-only pin is requested to be output
(see 18.3.1.1 in the refman). Also, rewrite mach-specific quirk setup to
consume less lines which scales better.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
[grant.likely: Fixed build error]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
These hooks will be needed by the general disabl/enable_irq();
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
GPIO's irq action's dev_id is set to the first struct ioh_gpio chip,
so when loop checking the 8 chips, the "chip" should be changed
according.
Signed-off-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
In adding DT binding support, the check for NULL platform_data got added
back in inadvertently, so remove it.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
A large chunk of qe_pin_request() is unnecessarily cut-and-paste
directly from of_get_named_gpio_flags(). This patch cuts out the
duplicate code and replaces it with a call to of_get_gpio().
v2: fixed compile error due to missing gpio_to_chip()
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
This patch adds a kernel message, containing GPIO range and device
name on successful device registration, and removes duplicate messages from the following drivers:
* gpio-adp5588
* gpio-bt8xx
* gpio-cs5535
* gpio-janz-ttl
* gpio-nomadik
* gpio-pcf857x
* gpio-xilinx
* drivers/of/gpio.c
Signed-off-by: Hartmut Knaack <knaack.h@gmx.de>
[grant.likely@secretlab.ca: squashed 2 patches together]
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
On October 1 in 2011,
OKI SEMICONDUCTOR Co., Ltd. changed the company name in to LAPIS Semiconductor Co., Ltd.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
ML7831 is companion chip for Intel Atom E6xx series.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
I screwed up by compiling that driver for the machine rather
than the arch. Correcting this fixes the build error.
Cc: Grant Likely <grant.likely@secretlab.ca>
Reported-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Commit af0c25c487 ("staging: remove obsoleted CS5535/CS5536 GPIO
driver") dropped CS5535_GPIO. So this last reference to CS5535_GPIO has
been an (inconsequential) nop since v3.1. Drop it too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
