Techwizz/kernel-fxtec-pro1x
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Author SHA1 Message Date
David Daney
aa32a955ae MIPS: Octeon: Update register definitions for CN63XX chips 
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together.  This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2010-10-29 19:08:33 +01:00
David Daney
a7187a2ffc MIPS: Octeon: Add register definitions for MGMT Ethernet driver. 
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2009-12-17 01:56:59 +00:00