mfd: lpc_ich: Add Device IDs for Intel 9 Series PCH

This patch adds the LPC Device IDs for the Intel 9 Series PCH.

Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit is contained in:
James Ralston 2014-08-27 14:34:25 -07:00 committed by Lee Jones
parent a0bc607208
commit fea31042ff

View file

@ -54,6 +54,7 @@
* document number TBD : Avoton SoC * document number TBD : Avoton SoC
* document number TBD : Coleto Creek * document number TBD : Coleto Creek
* document number TBD : Wildcat Point-LP * document number TBD : Wildcat Point-LP
* document number TBD : 9 Series
*/ */
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
@ -217,6 +218,7 @@ enum lpc_chipsets {
LPC_COLETO, /* Coleto Creek */ LPC_COLETO, /* Coleto Creek */
LPC_WPT_LP, /* Wildcat Point-LP */ LPC_WPT_LP, /* Wildcat Point-LP */
LPC_BRASWELL, /* Braswell SoC */ LPC_BRASWELL, /* Braswell SoC */
LPC_9S, /* 9 Series */
}; };
static struct lpc_ich_info lpc_chipset_info[] = { static struct lpc_ich_info lpc_chipset_info[] = {
@ -524,6 +526,10 @@ static struct lpc_ich_info lpc_chipset_info[] = {
.name = "Braswell SoC", .name = "Braswell SoC",
.iTCO_version = 3, .iTCO_version = 3,
}, },
[LPC_9S] = {
.name = "9 Series",
.iTCO_version = 2,
},
}; };
/* /*
@ -751,6 +757,11 @@ static const struct pci_device_id lpc_ich_ids[] = {
{ PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc7), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP}, { PCI_VDEVICE(INTEL, 0x9cc9), LPC_WPT_LP},
{ PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL}, { PCI_VDEVICE(INTEL, 0x229c), LPC_BRASWELL},
{ PCI_VDEVICE(INTEL, 0x8cc1), LPC_9S},
{ PCI_VDEVICE(INTEL, 0x8cc2), LPC_9S},
{ PCI_VDEVICE(INTEL, 0x8cc3), LPC_9S},
{ PCI_VDEVICE(INTEL, 0x8cc4), LPC_9S},
{ PCI_VDEVICE(INTEL, 0x8cc6), LPC_9S},
{ 0, }, /* End of list */ { 0, }, /* End of list */
}; };
MODULE_DEVICE_TABLE(pci, lpc_ich_ids); MODULE_DEVICE_TABLE(pci, lpc_ich_ids);