drm/i915: Compute physical addresses from base of stolen memory
The GATT is a write-only set of registers, reading from them in the manner of i915_gtt_to_phys() is supposed to be undefined. However a simple solution exists as we allocate linear memory from the stolen area, we can simply add the block offset to the base register. As a side-effect we recover all the unused stolen GTT entries and so enlarge our aperture. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson
parent
0b0b053a39
commit
fe669bf88e
2 changed files with 75 additions and 120 deletions
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@ -1007,73 +1007,47 @@ intel_teardown_mchbar(struct drm_device *dev)
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#define PTE_VALID (1 << 0)
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/**
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* i915_gtt_to_phys - take a GTT address and turn it into a physical one
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* i915_stolen_to_phys - take an offset into stolen memory and turn it into
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* a physical one
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* @dev: drm device
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* @gtt_addr: address to translate
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* @offset: address to translate
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*
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* Some chip functions require allocations from stolen space but need the
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* physical address of the memory in question. We use this routine
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* to get a physical address suitable for register programming from a given
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* GTT address.
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* Some chip functions require allocations from stolen space and need the
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* physical address of the memory in question.
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*/
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static unsigned long i915_gtt_to_phys(struct drm_device *dev,
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unsigned long gtt_addr)
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static unsigned long i915_stolen_to_phys(struct drm_device *dev, u32 offset)
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{
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unsigned long *gtt;
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unsigned long entry, phys;
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int gtt_bar = IS_GEN2(dev) ? 1 : 0;
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int gtt_offset, gtt_size;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct pci_dev *pdev = dev_priv->bridge_dev;
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u32 base;
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if (INTEL_INFO(dev)->gen >= 4) {
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if (IS_G4X(dev) || INTEL_INFO(dev)->gen > 4) {
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gtt_offset = 2*1024*1024;
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gtt_size = 2*1024*1024;
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} else {
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gtt_offset = 512*1024;
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gtt_size = 512*1024;
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}
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#if 0
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/* On the machines I have tested the Graphics Base of Stolen Memory
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* is unreliable, so compute the base by subtracting the stolen memory
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* from the Top of Low Usable DRAM which is where the BIOS places
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* the graphics stolen memory.
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*/
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if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
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/* top 32bits are reserved = 0 */
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pci_read_config_dword(pdev, 0xA4, &base);
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} else {
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gtt_bar = 3;
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gtt_offset = 0;
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gtt_size = pci_resource_len(dev->pdev, gtt_bar);
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/* XXX presume 8xx is the same as i915 */
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pci_bus_read_config_dword(pdev->bus, 2, 0x5C, &base);
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}
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gtt = ioremap_wc(pci_resource_start(dev->pdev, gtt_bar) + gtt_offset,
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gtt_size);
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if (!gtt) {
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DRM_ERROR("ioremap of GTT failed\n");
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return 0;
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#else
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if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
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u16 val;
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pci_read_config_word(pdev, 0xb0, &val);
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base = val >> 4 << 20;
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} else {
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u8 val;
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pci_read_config_byte(pdev, 0x9c, &val);
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base = val >> 3 << 27;
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}
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base -= dev_priv->mm.gtt->gtt_stolen_entries << PAGE_SHIFT;
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#endif
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entry = *(volatile u32 *)(gtt + (gtt_addr / 1024));
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DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry);
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/* Mask out these reserved bits on this hardware. */
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if (INTEL_INFO(dev)->gen < 4 && !IS_G33(dev))
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entry &= ~PTE_ADDRESS_MASK_HIGH;
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/* If it's not a mapping type we know, then bail. */
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if ((entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_UNCACHED &&
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(entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_CACHED) {
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iounmap(gtt);
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return 0;
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}
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if (!(entry & PTE_VALID)) {
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DRM_ERROR("bad GTT entry in stolen space\n");
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iounmap(gtt);
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return 0;
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}
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iounmap(gtt);
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phys =(entry & PTE_ADDRESS_MASK) |
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((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4));
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DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys);
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return phys;
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return base + offset;
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}
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static void i915_warn_stolen(struct drm_device *dev)
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@ -1089,47 +1063,28 @@ static void i915_setup_compression(struct drm_device *dev, int size)
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unsigned long cfb_base;
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unsigned long ll_base = 0;
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/* Leave 1M for line length buffer & misc. */
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compressed_fb = drm_mm_search_free(&dev_priv->mm.vram, size, 4096, 0);
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if (!compressed_fb) {
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dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
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i915_warn_stolen(dev);
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return;
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}
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compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096, 0);
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if (compressed_fb)
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compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
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if (!compressed_fb)
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goto err;
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compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
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if (!compressed_fb) {
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i915_warn_stolen(dev);
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dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
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return;
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}
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cfb_base = i915_gtt_to_phys(dev, compressed_fb->start);
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if (!cfb_base) {
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DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
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drm_mm_put_block(compressed_fb);
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}
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cfb_base = i915_stolen_to_phys(dev, compressed_fb->start);
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if (!cfb_base)
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goto err_fb;
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if (!(IS_GM45(dev) || IS_IRONLAKE_M(dev))) {
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compressed_llb = drm_mm_search_free(&dev_priv->mm.vram, 4096,
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4096, 0);
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if (!compressed_llb) {
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i915_warn_stolen(dev);
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return;
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}
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compressed_llb = drm_mm_search_free(&dev_priv->mm.stolen,
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4096, 4096, 0);
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if (compressed_llb)
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compressed_llb = drm_mm_get_block(compressed_llb,
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4096, 4096);
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if (!compressed_llb)
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goto err_fb;
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compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096);
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if (!compressed_llb) {
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i915_warn_stolen(dev);
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return;
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}
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ll_base = i915_gtt_to_phys(dev, compressed_llb->start);
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if (!ll_base) {
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DRM_ERROR("failed to get stolen phys addr, disabling FBC\n");
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drm_mm_put_block(compressed_fb);
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drm_mm_put_block(compressed_llb);
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}
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ll_base = i915_stolen_to_phys(dev, compressed_llb->start);
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if (!ll_base)
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goto err_llb;
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}
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dev_priv->cfb_size = size;
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@ -1146,8 +1101,17 @@ static void i915_setup_compression(struct drm_device *dev, int size)
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dev_priv->compressed_llb = compressed_llb;
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}
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DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base,
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ll_base, size >> 20);
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DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n",
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cfb_base, ll_base, size >> 20);
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return;
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err_llb:
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drm_mm_put_block(compressed_llb);
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err_fb:
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drm_mm_put_block(compressed_fb);
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err:
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dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
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i915_warn_stolen(dev);
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}
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static void i915_cleanup_compression(struct drm_device *dev)
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@ -1207,12 +1171,11 @@ static int i915_load_modeset_init(struct drm_device *dev)
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prealloc_size = dev_priv->mm.gtt->gtt_stolen_entries << PAGE_SHIFT;
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gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
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mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
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gtt_size -= PAGE_SIZE;
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/* Basic memrange allocator for stolen space (aka mm.vram) */
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drm_mm_init(&dev_priv->mm.vram, 0, prealloc_size);
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/* Basic memrange allocator for stolen space */
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drm_mm_init(&dev_priv->mm.stolen, 0, prealloc_size);
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/* Let GEM Manage from end of prealloc space to end of aperture.
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/* Let GEM Manage all of the aperture.
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*
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* However, leave one page at the end still bound to the scratch page.
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* There are a number of places where the hardware apparently
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@ -1221,7 +1184,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
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* at the last page of the aperture. One page should be enough to
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* keep any prefetching inside of the aperture.
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*/
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i915_gem_do_init(dev, prealloc_size, mappable_size, gtt_size);
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i915_gem_do_init(dev, 0, mappable_size, gtt_size - PAGE_SIZE);
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mutex_lock(&dev->struct_mutex);
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ret = i915_gem_init_ringbuffer(dev);
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@ -1233,16 +1196,17 @@ static int i915_load_modeset_init(struct drm_device *dev)
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if (I915_HAS_FBC(dev) && i915_powersave) {
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int cfb_size;
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/* Try to get an 8M buffer... */
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if (prealloc_size > (9*1024*1024))
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cfb_size = 8*1024*1024;
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/* Leave 1M for line length buffer & misc. */
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/* Try to get a 32M buffer... */
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if (prealloc_size > (36*1024*1024))
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cfb_size = 32*1024*1024;
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else /* fall back to 7/8 of the stolen space */
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cfb_size = prealloc_size * 7 / 8;
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i915_setup_compression(dev, cfb_size);
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}
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/* Allow hardware batchbuffers unless told otherwise.
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*/
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/* Allow hardware batchbuffers unless told otherwise. */
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dev_priv->allow_batchbuffer = 1;
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ret = intel_parse_bios(dev);
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@ -1892,7 +1856,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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{
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struct drm_i915_private *dev_priv;
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int ret = 0, mmio_bar;
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uint32_t agp_size, prealloc_size;
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uint32_t agp_size;
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/* i915 has 4 more counters */
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dev->counters += 4;
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dev->types[6] = _DRM_STAT_IRQ;
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@ -1932,7 +1897,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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goto out_iomapfree;
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}
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prealloc_size = dev_priv->mm.gtt->gtt_stolen_entries << PAGE_SHIFT;
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agp_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
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dev_priv->mm.gtt_mapping =
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@ -1980,15 +1944,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
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/* enable GEM by default */
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dev_priv->has_gem = 1;
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if (prealloc_size > agp_size * 3 / 4) {
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DRM_ERROR("Detected broken video BIOS with %d/%dkB of video "
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"memory stolen.\n",
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prealloc_size / 1024, agp_size / 1024);
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DRM_ERROR("Disabling GEM. (try reducing stolen memory or "
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"updating the BIOS to fix).\n");
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dev_priv->has_gem = 0;
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}
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if (dev_priv->has_gem == 0 &&
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drm_core_check_feature(dev, DRIVER_MODESET)) {
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DRM_ERROR("kernel modesetting requires GEM, disabling driver.\n");
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@ -2162,7 +2117,7 @@ int i915_driver_unload(struct drm_device *dev)
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mutex_unlock(&dev->struct_mutex);
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if (I915_HAS_FBC(dev) && i915_powersave)
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i915_cleanup_compression(dev);
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drm_mm_takedown(&dev_priv->mm.vram);
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drm_mm_takedown(&dev_priv->mm.stolen);
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intel_cleanup_overlay(dev);
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@ -544,7 +544,7 @@ typedef struct drm_i915_private {
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/** Bridge to intel-gtt-ko */
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struct intel_gtt *gtt;
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/** Memory allocator for GTT stolen memory */
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struct drm_mm vram;
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struct drm_mm stolen;
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/** Memory allocator for GTT */
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struct drm_mm gtt_space;
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/** End of mappable part of GTT */
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