Techwizz/kernel-fxtec-pro1x
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

MIPS: OCTEON: Use correct CSR to soft reset

Browse source 
This fixes reboot for Octeon III boards

[ralf@linux-mips.org: Dropped segment for function cvmx_reset_octeon()
which was removed by the preceeding commit.]

Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chandrakala Chavva 2015-03-05 18:06:11 +03:00 committed by Ralf Baechle
parent 254f0bd99d
commit fe2360f8f5
1 changed files with 4 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
arch/mips/cavium-octeon/setup.c
View file

@ -416,7 +416,10 @@ static void octeon_restart(char *command)
mb();
while (1)
cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
if (OCTEON_IS_OCTEON3())
cvmx_write_csr(CVMX_RST_SOFT_RST, 1);
else
cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
}