locking/xchg/alpha: Remove superfluous memory barriers from the _local() variants
The following two commits:79d442461d("locking/xchg/alpha: Clean up barrier usage by using smp_mb() in place of __ASM__MB")472e8c55cf("locking/xchg/alpha: Fix xchg() and cmpxchg() memory ordering bugs") ... ended up adding unnecessary barriers to the _local() variants on Alpha, which the previous code took care to avoid. Fix them by adding the smp_mb() into the cmpxchg() macro rather than into the ____cmpxchg() variants. Reported-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Cc: Alan Stern <stern@rowland.harvard.edu> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Matt Turner <mattst88@gmail.com> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-alpha@vger.kernel.org Fixes:472e8c55cf("locking/xchg/alpha: Fix xchg() and cmpxchg() memory ordering bugs") Fixes:79d442461d("locking/xchg/alpha: Clean up barrier usage by using smp_mb() in place of __ASM__MB") Link: http://lkml.kernel.org/r/1519704058-13430-1-git-send-email-parri.andrea@gmail.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Andrea Parri
Ingo Molnar
parent
bd5c0ba2cd
commit
fbfcd01991
2 changed files with 16 additions and 31 deletions
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@ -38,19 +38,31 @@
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#define ____cmpxchg(type, args...) __cmpxchg ##type(args)
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#include <asm/xchg.h>
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/*
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* The leading and the trailing memory barriers guarantee that these
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* operations are fully ordered.
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*/
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#define xchg(ptr, x) \
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({ \
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__typeof__(*(ptr)) __ret; \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, \
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sizeof(*(ptr))); \
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smp_mb(); \
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__ret = (__typeof__(*(ptr))) \
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__xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \
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smp_mb(); \
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__ret; \
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})
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#define cmpxchg(ptr, o, n) \
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({ \
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__typeof__(*(ptr)) __ret; \
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__typeof__(*(ptr)) _o_ = (o); \
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__typeof__(*(ptr)) _n_ = (n); \
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(__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
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(unsigned long)_n_, sizeof(*(ptr)));\
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smp_mb(); \
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__ret = (__typeof__(*(ptr))) __cmpxchg((ptr), \
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(unsigned long)_o_, (unsigned long)_n_, sizeof(*(ptr)));\
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smp_mb(); \
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__ret; \
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})
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#define cmpxchg64(ptr, o, n) \
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@ -12,10 +12,6 @@
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* Atomic exchange.
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* Since it can be used to implement critical sections
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* it must clobber "memory" (also for interrupts in UP).
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*
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* The leading and the trailing memory barriers guarantee that these
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* operations are fully ordered.
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*
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*/
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static inline unsigned long
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@ -23,7 +19,6 @@ ____xchg(_u8, volatile char *m, unsigned long val)
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{
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unsigned long ret, tmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %4,7,%3\n"
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" insbl %1,%4,%1\n"
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@ -38,7 +33,6 @@ ____xchg(_u8, volatile char *m, unsigned long val)
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".previous"
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: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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: "r" ((long)m), "1" (val) : "memory");
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smp_mb();
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return ret;
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}
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@ -48,7 +42,6 @@ ____xchg(_u16, volatile short *m, unsigned long val)
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{
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unsigned long ret, tmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %4,7,%3\n"
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" inswl %1,%4,%1\n"
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@ -63,7 +56,6 @@ ____xchg(_u16, volatile short *m, unsigned long val)
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".previous"
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: "=&r" (ret), "=&r" (val), "=&r" (tmp), "=&r" (addr64)
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: "r" ((long)m), "1" (val) : "memory");
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smp_mb();
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return ret;
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}
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@ -73,7 +65,6 @@ ____xchg(_u32, volatile int *m, unsigned long val)
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{
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unsigned long dummy;
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smp_mb();
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__asm__ __volatile__(
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"1: ldl_l %0,%4\n"
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" bis $31,%3,%1\n"
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@ -84,7 +75,6 @@ ____xchg(_u32, volatile int *m, unsigned long val)
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".previous"
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: "=&r" (val), "=&r" (dummy), "=m" (*m)
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: "rI" (val), "m" (*m) : "memory");
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smp_mb();
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return val;
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}
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@ -94,7 +84,6 @@ ____xchg(_u64, volatile long *m, unsigned long val)
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{
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unsigned long dummy;
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smp_mb();
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__asm__ __volatile__(
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"1: ldq_l %0,%4\n"
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" bis $31,%3,%1\n"
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@ -105,7 +94,6 @@ ____xchg(_u64, volatile long *m, unsigned long val)
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".previous"
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: "=&r" (val), "=&r" (dummy), "=m" (*m)
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: "rI" (val), "m" (*m) : "memory");
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smp_mb();
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return val;
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}
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@ -135,13 +123,6 @@ ____xchg(, volatile void *ptr, unsigned long x, int size)
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*
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* The leading and the trailing memory barriers guarantee that these
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* operations are fully ordered.
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*
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* The trailing memory barrier is placed in SMP unconditionally, in
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* order to guarantee that dependency ordering is preserved when a
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* dependency is headed by an unsuccessful operation.
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*/
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static inline unsigned long
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@ -149,7 +130,6 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
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{
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unsigned long prev, tmp, cmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %5,7,%4\n"
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" insbl %1,%5,%1\n"
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@ -167,7 +147,6 @@ ____cmpxchg(_u8, volatile char *m, unsigned char old, unsigned char new)
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".previous"
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: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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smp_mb();
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return prev;
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}
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@ -177,7 +156,6 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
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{
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unsigned long prev, tmp, cmp, addr64;
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smp_mb();
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__asm__ __volatile__(
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" andnot %5,7,%4\n"
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" inswl %1,%5,%1\n"
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@ -195,7 +173,6 @@ ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
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".previous"
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: "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
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: "r" ((long)m), "Ir" (old), "1" (new) : "memory");
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smp_mb();
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return prev;
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}
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@ -205,7 +182,6 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
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{
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unsigned long prev, cmp;
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smp_mb();
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__asm__ __volatile__(
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"1: ldl_l %0,%5\n"
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" cmpeq %0,%3,%1\n"
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@ -219,7 +195,6 @@ ____cmpxchg(_u32, volatile int *m, int old, int new)
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m) : "memory");
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smp_mb();
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return prev;
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}
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@ -229,7 +204,6 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
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{
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unsigned long prev, cmp;
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smp_mb();
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__asm__ __volatile__(
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"1: ldq_l %0,%5\n"
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" cmpeq %0,%3,%1\n"
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@ -243,7 +217,6 @@ ____cmpxchg(_u64, volatile long *m, unsigned long old, unsigned long new)
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".previous"
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: "=&r"(prev), "=&r"(cmp), "=m"(*m)
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: "r"((long) old), "r"(new), "m"(*m) : "memory");
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smp_mb();
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return prev;
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}
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