irqchip/gicv3-its: numa: Enable workaround for Cavium thunderx erratum 23144
The erratum fixes the hang of ITS SYNC command by avoiding inter node io and collections/cpu mapping on thunderx dual-socket platform. This fix is only applicable for Cavium's ThunderX dual-socket platform. Reviewed-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com> Signed-off-by: Robert Richter <rrichter@cavium.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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3 changed files with 57 additions and 2 deletions
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@ -56,6 +56,7 @@ stable kernels.
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| ARM | MMU-500 | #841119,#826419 | N/A |
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| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
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| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
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| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
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| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
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| Cavium | ThunderX SMMUv2 | #27704 | N/A |
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@ -426,6 +426,15 @@ config CAVIUM_ERRATUM_22375
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If unsure, say Y.
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config CAVIUM_ERRATUM_23144
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bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
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depends on NUMA
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default y
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help
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ITS SYNC command hang for cross node io and collections/cpu mapping.
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If unsure, say Y.
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config CAVIUM_ERRATUM_23154
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bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
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default y
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@ -41,6 +41,7 @@
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#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0)
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#define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1)
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#define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2)
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#define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
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@ -82,6 +83,7 @@ struct its_node {
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u64 flags;
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u32 ite_size;
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u32 device_ids;
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int numa_node;
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};
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#define ITS_ITT_ALIGN SZ_256
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@ -613,11 +615,23 @@ static void its_unmask_irq(struct irq_data *d)
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static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
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bool force)
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{
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unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask);
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unsigned int cpu;
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const struct cpumask *cpu_mask = cpu_online_mask;
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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struct its_collection *target_col;
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u32 id = its_get_event_id(d);
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/* lpi cannot be routed to a redistributor that is on a foreign node */
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if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) {
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if (its_dev->its->numa_node >= 0) {
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cpu_mask = cpumask_of_node(its_dev->its->numa_node);
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if (!cpumask_intersects(mask_val, cpu_mask))
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return -EINVAL;
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}
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}
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cpu = cpumask_any_and(mask_val, cpu_mask);
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if (cpu >= nr_cpu_ids)
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return -EINVAL;
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@ -1101,6 +1115,16 @@ static void its_cpu_init_collection(void)
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list_for_each_entry(its, &its_nodes, entry) {
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u64 target;
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/* avoid cross node collections and its mapping */
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if (its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144) {
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struct device_node *cpu_node;
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cpu_node = of_get_cpu_node(cpu, NULL);
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if (its->numa_node != NUMA_NO_NODE &&
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its->numa_node != of_node_to_nid(cpu_node))
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continue;
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}
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/*
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* We now have to bind each collection to its target
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* redistributor.
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@ -1351,9 +1375,14 @@ static void its_irq_domain_activate(struct irq_domain *domain,
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{
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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u32 event = its_get_event_id(d);
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const struct cpumask *cpu_mask = cpu_online_mask;
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/* get the cpu_mask of local node */
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if (its_dev->its->numa_node >= 0)
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cpu_mask = cpumask_of_node(its_dev->its->numa_node);
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/* Bind the LPI to the first possible CPU */
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its_dev->event_map.col_map[event] = cpumask_first(cpu_online_mask);
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its_dev->event_map.col_map[event] = cpumask_first(cpu_mask);
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/* Map the GIC IRQ and event to the device */
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its_send_mapvi(its_dev, d->hwirq, event);
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@ -1443,6 +1472,13 @@ static void __maybe_unused its_enable_quirk_cavium_22375(void *data)
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its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_22375;
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}
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static void __maybe_unused its_enable_quirk_cavium_23144(void *data)
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{
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struct its_node *its = data;
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its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_23144;
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}
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static const struct gic_quirk its_quirks[] = {
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#ifdef CONFIG_CAVIUM_ERRATUM_22375
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{
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@ -1451,6 +1487,14 @@ static const struct gic_quirk its_quirks[] = {
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.mask = 0xffff0fff,
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.init = its_enable_quirk_cavium_22375,
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},
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#endif
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#ifdef CONFIG_CAVIUM_ERRATUM_23144
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{
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.desc = "ITS: Cavium erratum 23144",
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.iidr = 0xa100034c, /* ThunderX pass 1.x */
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.mask = 0xffff0fff,
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.init = its_enable_quirk_cavium_23144,
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},
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#endif
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{
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}
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@ -1514,6 +1558,7 @@ static int __init its_probe(struct device_node *node,
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its->base = its_base;
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its->phys_base = res.start;
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its->ite_size = ((readl_relaxed(its_base + GITS_TYPER) >> 4) & 0xf) + 1;
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its->numa_node = of_node_to_nid(node);
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its->cmd_base = kzalloc(ITS_CMD_QUEUE_SZ, GFP_KERNEL);
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if (!its->cmd_base) {
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