ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is used, and then register device's gsi with the core IRQ subsystem. acpi_register_gsi() is similar to DT based irq_of_parse_and_map(), since gsi is unique in the system, so use hwirq number directly for the mapping. We are going to implement stacked domains when GICv2m, GICv3, ITS support are added. CC: Marc Zyngier <marc.zyngier@arm.com> Originally-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Tested-by: Yijing Wang <wangyijing@huawei.com> Tested-by: Mark Langsdorf <mlangsdo@redhat.com> Tested-by: Jon Masters <jcm@redhat.com> Tested-by: Timur Tabi <timur@codeaurora.org> Tested-by: Robert Richter <rrichter@cavium.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Grant Likely <grant.likely@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
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3 changed files with 77 additions and 0 deletions
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@ -75,6 +75,12 @@ static int __init dt_scan_depth1_nodes(unsigned long node,
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return 0;
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}
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/*
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* Since we're on ARM, the default interrupt routing model
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* clearly has to be GIC.
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*/
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enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
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/*
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* __acpi_map_table() will be called before page_init(), so early_ioremap()
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* or early_memremap() should be called here to for ACPI table mapping.
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@ -218,6 +224,73 @@ void __init acpi_init_cpus(void)
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pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
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}
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int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
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{
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*irq = irq_find_mapping(NULL, gsi);
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return 0;
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}
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EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
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/*
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* success: return IRQ number (>0)
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* failure: return =< 0
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*/
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int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
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{
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unsigned int irq;
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unsigned int irq_type;
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/*
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* ACPI have no bindings to indicate SPI or PPI, so we
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* use different mappings from DT in ACPI.
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*
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* For FDT
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* PPI interrupt: in the range [0, 15];
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* SPI interrupt: in the range [0, 987];
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*
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* For ACPI, GSI should be unique so using
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* the hwirq directly for the mapping:
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* PPI interrupt: in the range [16, 31];
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* SPI interrupt: in the range [32, 1019];
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*/
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if (trigger == ACPI_EDGE_SENSITIVE &&
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polarity == ACPI_ACTIVE_LOW)
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irq_type = IRQ_TYPE_EDGE_FALLING;
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else if (trigger == ACPI_EDGE_SENSITIVE &&
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polarity == ACPI_ACTIVE_HIGH)
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irq_type = IRQ_TYPE_EDGE_RISING;
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else if (trigger == ACPI_LEVEL_SENSITIVE &&
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polarity == ACPI_ACTIVE_LOW)
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irq_type = IRQ_TYPE_LEVEL_LOW;
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else if (trigger == ACPI_LEVEL_SENSITIVE &&
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polarity == ACPI_ACTIVE_HIGH)
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irq_type = IRQ_TYPE_LEVEL_HIGH;
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else
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irq_type = IRQ_TYPE_NONE;
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/*
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* Since only one GIC is supported in ACPI 5.0, we can
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* create mapping refer to the default domain
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*/
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irq = irq_create_mapping(NULL, gsi);
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if (!irq)
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return irq;
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/* Set irq type if specified and different than the current one */
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if (irq_type != IRQ_TYPE_NONE &&
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irq_type != irq_get_trigger_type(irq))
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irq_set_irq_type(irq, irq_type);
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return irq;
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}
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EXPORT_SYMBOL_GPL(acpi_register_gsi);
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void acpi_unregister_gsi(u32 gsi)
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{
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}
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EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
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static int __init acpi_parse_fadt(struct acpi_table_header *table)
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{
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struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
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@ -448,6 +448,9 @@ static int __init acpi_bus_init_irq(void)
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case ACPI_IRQ_MODEL_IOSAPIC:
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message = "IOSAPIC";
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break;
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case ACPI_IRQ_MODEL_GIC:
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message = "GIC";
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break;
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case ACPI_IRQ_MODEL_PLATFORM:
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message = "platform specific model";
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break;
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@ -73,6 +73,7 @@ enum acpi_irq_model_id {
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ACPI_IRQ_MODEL_IOAPIC,
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ACPI_IRQ_MODEL_IOSAPIC,
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ACPI_IRQ_MODEL_PLATFORM,
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ACPI_IRQ_MODEL_GIC,
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ACPI_IRQ_MODEL_COUNT
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};
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