remove dma operations in struct ia64_machine_vector
We don't need dma operation hooks in struct ia64_machine_vector now. This also removes unused ia64_mv_dma_* typedefs. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
parent
b7ea6e9518
commit
fad6a029c4
6 changed files with 12 additions and 186 deletions
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@ -22,14 +22,18 @@ extern int swiotlb_late_init_with_default_size (size_t size);
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/* hwiommu declarations & definitions: */
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extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
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extern ia64_mv_dma_free_coherent sba_free_coherent;
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extern ia64_mv_dma_map_single_attrs sba_map_single_attrs;
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extern ia64_mv_dma_unmap_single_attrs sba_unmap_single_attrs;
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extern ia64_mv_dma_map_sg_attrs sba_map_sg_attrs;
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extern ia64_mv_dma_unmap_sg_attrs sba_unmap_sg_attrs;
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extern ia64_mv_dma_supported sba_dma_supported;
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extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
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extern void *sba_alloc_coherent(struct device *, size_t, dma_addr_t *, gfp_t);
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extern void sba_free_coherent (struct device *, size_t, void *, dma_addr_t);
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extern dma_addr_t sba_map_single_attrs(struct device *, void *, size_t, int,
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struct dma_attrs *);
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extern void sba_unmap_single_attrs(struct device *, dma_addr_t, size_t, int,
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struct dma_attrs *);
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extern int sba_map_sg_attrs(struct device *, struct scatterlist *, int, int,
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struct dma_attrs *);
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extern void sba_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
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struct dma_attrs *);
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extern int sba_dma_supported (struct device *, u64);
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extern int sba_dma_mapping_error(struct device *, dma_addr_t);
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#define hwiommu_alloc_coherent sba_alloc_coherent
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#define hwiommu_free_coherent sba_free_coherent
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@ -45,23 +45,6 @@ typedef void ia64_mv_kernel_launch_event_t(void);
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/* DMA-mapping interface: */
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typedef void ia64_mv_dma_init (void);
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typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t);
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typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t);
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typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int);
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typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int);
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typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int);
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typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int);
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typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int);
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typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int);
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typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr);
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typedef int ia64_mv_dma_supported (struct device *, u64);
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typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *);
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typedef void ia64_mv_dma_unmap_single_attrs (struct device *, dma_addr_t, size_t, int, struct dma_attrs *);
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typedef int ia64_mv_dma_map_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
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typedef void ia64_mv_dma_unmap_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *);
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/*
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* WARNING: The legacy I/O space is _architected_. Platforms are
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@ -147,18 +130,6 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
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# define platform_global_tlb_purge ia64_mv.global_tlb_purge
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# define platform_tlb_migrate_finish ia64_mv.tlb_migrate_finish
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# define platform_dma_init ia64_mv.dma_init
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# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent
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# define platform_dma_free_coherent ia64_mv.dma_free_coherent
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# define platform_dma_map_single_attrs ia64_mv.dma_map_single_attrs
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# define platform_dma_unmap_single_attrs ia64_mv.dma_unmap_single_attrs
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# define platform_dma_map_sg_attrs ia64_mv.dma_map_sg_attrs
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# define platform_dma_unmap_sg_attrs ia64_mv.dma_unmap_sg_attrs
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# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu
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# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu
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# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device
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# define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device
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# define platform_dma_mapping_error ia64_mv.dma_mapping_error
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# define platform_dma_supported ia64_mv.dma_supported
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# define platform_irq_to_vector ia64_mv.irq_to_vector
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# define platform_local_vector_to_irq ia64_mv.local_vector_to_irq
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# define platform_pci_get_legacy_mem ia64_mv.pci_get_legacy_mem
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@ -201,18 +172,6 @@ struct ia64_machine_vector {
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ia64_mv_global_tlb_purge_t *global_tlb_purge;
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ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish;
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ia64_mv_dma_init *dma_init;
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ia64_mv_dma_alloc_coherent *dma_alloc_coherent;
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ia64_mv_dma_free_coherent *dma_free_coherent;
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ia64_mv_dma_map_single_attrs *dma_map_single_attrs;
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ia64_mv_dma_unmap_single_attrs *dma_unmap_single_attrs;
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ia64_mv_dma_map_sg_attrs *dma_map_sg_attrs;
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ia64_mv_dma_unmap_sg_attrs *dma_unmap_sg_attrs;
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ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu;
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ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu;
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ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device;
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ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device;
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ia64_mv_dma_mapping_error *dma_mapping_error;
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ia64_mv_dma_supported *dma_supported;
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ia64_mv_irq_to_vector *irq_to_vector;
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ia64_mv_local_vector_to_irq *local_vector_to_irq;
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ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem;
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@ -251,18 +210,6 @@ struct ia64_machine_vector {
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platform_global_tlb_purge, \
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platform_tlb_migrate_finish, \
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platform_dma_init, \
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platform_dma_alloc_coherent, \
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platform_dma_free_coherent, \
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platform_dma_map_single_attrs, \
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platform_dma_unmap_single_attrs, \
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platform_dma_map_sg_attrs, \
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platform_dma_unmap_sg_attrs, \
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platform_dma_sync_single_for_cpu, \
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platform_dma_sync_sg_for_cpu, \
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platform_dma_sync_single_for_device, \
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platform_dma_sync_sg_for_device, \
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platform_dma_mapping_error, \
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platform_dma_supported, \
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platform_irq_to_vector, \
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platform_local_vector_to_irq, \
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platform_pci_get_legacy_mem, \
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@ -332,42 +279,6 @@ extern void swiotlb_dma_init(void);
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#ifndef platform_dma_init
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# define platform_dma_init swiotlb_dma_init
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#endif
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#ifndef platform_dma_alloc_coherent
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# define platform_dma_alloc_coherent swiotlb_alloc_coherent
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#endif
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#ifndef platform_dma_free_coherent
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# define platform_dma_free_coherent swiotlb_free_coherent
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#endif
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#ifndef platform_dma_map_single_attrs
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# define platform_dma_map_single_attrs swiotlb_map_single_attrs
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#endif
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#ifndef platform_dma_unmap_single_attrs
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# define platform_dma_unmap_single_attrs swiotlb_unmap_single_attrs
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#endif
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#ifndef platform_dma_map_sg_attrs
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# define platform_dma_map_sg_attrs swiotlb_map_sg_attrs
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#endif
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#ifndef platform_dma_unmap_sg_attrs
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# define platform_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs
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#endif
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#ifndef platform_dma_sync_single_for_cpu
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# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu
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#endif
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#ifndef platform_dma_sync_sg_for_cpu
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# define platform_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu
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#endif
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#ifndef platform_dma_sync_single_for_device
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# define platform_dma_sync_single_for_device swiotlb_sync_single_for_device
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#endif
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#ifndef platform_dma_sync_sg_for_device
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# define platform_dma_sync_sg_for_device swiotlb_sync_sg_for_device
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#endif
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#ifndef platform_dma_mapping_error
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# define platform_dma_mapping_error swiotlb_dma_mapping_error
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#endif
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#ifndef platform_dma_supported
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# define platform_dma_supported swiotlb_dma_supported
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#endif
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#ifndef platform_irq_to_vector
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# define platform_irq_to_vector __ia64_irq_to_vector
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#endif
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@ -2,14 +2,6 @@
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#define _ASM_IA64_MACHVEC_DIG_VTD_h
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extern ia64_mv_setup_t dig_setup;
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extern ia64_mv_dma_alloc_coherent vtd_alloc_coherent;
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extern ia64_mv_dma_free_coherent vtd_free_coherent;
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extern ia64_mv_dma_map_single_attrs vtd_map_single_attrs;
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extern ia64_mv_dma_unmap_single_attrs vtd_unmap_single_attrs;
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extern ia64_mv_dma_map_sg_attrs vtd_map_sg_attrs;
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extern ia64_mv_dma_unmap_sg_attrs vtd_unmap_sg_attrs;
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extern ia64_mv_dma_supported iommu_dma_supported;
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extern ia64_mv_dma_mapping_error vtd_dma_mapping_error;
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extern ia64_mv_dma_init pci_iommu_alloc;
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/*
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#define platform_name "dig_vtd"
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#define platform_setup dig_setup
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#define platform_dma_init pci_iommu_alloc
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#define platform_dma_alloc_coherent vtd_alloc_coherent
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#define platform_dma_free_coherent vtd_free_coherent
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#define platform_dma_map_single_attrs vtd_map_single_attrs
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#define platform_dma_unmap_single_attrs vtd_unmap_single_attrs
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#define platform_dma_map_sg_attrs vtd_map_sg_attrs
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#define platform_dma_unmap_sg_attrs vtd_unmap_sg_attrs
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#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
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#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
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#define platform_dma_sync_single_for_device machvec_dma_sync_single
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#define platform_dma_sync_sg_for_device machvec_dma_sync_sg
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#define platform_dma_supported iommu_dma_supported
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#define platform_dma_mapping_error vtd_dma_mapping_error
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#endif /* _ASM_IA64_MACHVEC_DIG_VTD_h */
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@ -3,14 +3,6 @@
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extern ia64_mv_setup_t dig_setup;
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extern ia64_mv_dma_init sba_dma_init;
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extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
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extern ia64_mv_dma_free_coherent sba_free_coherent;
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extern ia64_mv_dma_map_single_attrs sba_map_single_attrs;
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extern ia64_mv_dma_unmap_single_attrs sba_unmap_single_attrs;
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extern ia64_mv_dma_map_sg_attrs sba_map_sg_attrs;
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extern ia64_mv_dma_unmap_sg_attrs sba_unmap_sg_attrs;
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extern ia64_mv_dma_supported sba_dma_supported;
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extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
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/*
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* This stuff has dual use!
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@ -22,17 +14,5 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
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#define platform_name "hpzx1"
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#define platform_setup dig_setup
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#define platform_dma_init sba_dma_init
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#define platform_dma_alloc_coherent sba_alloc_coherent
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#define platform_dma_free_coherent sba_free_coherent
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#define platform_dma_map_single_attrs sba_map_single_attrs
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#define platform_dma_unmap_single_attrs sba_unmap_single_attrs
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#define platform_dma_map_sg_attrs sba_map_sg_attrs
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#define platform_dma_unmap_sg_attrs sba_unmap_sg_attrs
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#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
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#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
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#define platform_dma_sync_single_for_device machvec_dma_sync_single
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#define platform_dma_sync_sg_for_device machvec_dma_sync_sg
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#define platform_dma_supported sba_dma_supported
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#define platform_dma_mapping_error sba_dma_mapping_error
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#endif /* _ASM_IA64_MACHVEC_HPZX1_h */
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@ -2,18 +2,6 @@
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#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
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extern ia64_mv_setup_t dig_setup;
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extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
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extern ia64_mv_dma_free_coherent hwsw_free_coherent;
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extern ia64_mv_dma_map_single_attrs hwsw_map_single_attrs;
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extern ia64_mv_dma_unmap_single_attrs hwsw_unmap_single_attrs;
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extern ia64_mv_dma_map_sg_attrs hwsw_map_sg_attrs;
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extern ia64_mv_dma_unmap_sg_attrs hwsw_unmap_sg_attrs;
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extern ia64_mv_dma_supported hwsw_dma_supported;
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extern ia64_mv_dma_mapping_error hwsw_dma_mapping_error;
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extern ia64_mv_dma_sync_single_for_cpu hwsw_sync_single_for_cpu;
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extern ia64_mv_dma_sync_sg_for_cpu hwsw_sync_sg_for_cpu;
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extern ia64_mv_dma_sync_single_for_device hwsw_sync_single_for_device;
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extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
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/*
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* This stuff has dual use!
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* the macros are used directly.
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*/
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#define platform_name "hpzx1_swiotlb"
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#define platform_setup dig_setup
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#define platform_dma_init machvec_noop
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#define platform_dma_alloc_coherent hwsw_alloc_coherent
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#define platform_dma_free_coherent hwsw_free_coherent
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#define platform_dma_map_single_attrs hwsw_map_single_attrs
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#define platform_dma_unmap_single_attrs hwsw_unmap_single_attrs
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#define platform_dma_map_sg_attrs hwsw_map_sg_attrs
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#define platform_dma_unmap_sg_attrs hwsw_unmap_sg_attrs
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#define platform_dma_supported hwsw_dma_supported
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#define platform_dma_mapping_error hwsw_dma_mapping_error
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#define platform_dma_sync_single_for_cpu hwsw_sync_single_for_cpu
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#define platform_dma_sync_sg_for_cpu hwsw_sync_sg_for_cpu
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#define platform_dma_sync_single_for_device hwsw_sync_single_for_device
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#define platform_dma_sync_sg_for_device hwsw_sync_sg_for_device
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#endif /* _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h */
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@ -56,18 +56,6 @@ extern ia64_mv_readw_t __sn_readw_relaxed;
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extern ia64_mv_readl_t __sn_readl_relaxed;
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extern ia64_mv_readq_t __sn_readq_relaxed;
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extern ia64_mv_dma_init sn_dma_init;
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extern ia64_mv_dma_alloc_coherent sn_dma_alloc_coherent;
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extern ia64_mv_dma_free_coherent sn_dma_free_coherent;
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extern ia64_mv_dma_map_single_attrs sn_dma_map_single_attrs;
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extern ia64_mv_dma_unmap_single_attrs sn_dma_unmap_single_attrs;
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extern ia64_mv_dma_map_sg_attrs sn_dma_map_sg_attrs;
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extern ia64_mv_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs;
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extern ia64_mv_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu;
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extern ia64_mv_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu;
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extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device;
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extern ia64_mv_dma_sync_sg_for_device sn_dma_sync_sg_for_device;
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extern ia64_mv_dma_mapping_error sn_dma_mapping_error;
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extern ia64_mv_dma_supported sn_dma_supported;
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extern ia64_mv_migrate_t sn_migrate;
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extern ia64_mv_kernel_launch_event_t sn_kernel_launch_event;
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extern ia64_mv_setup_msi_irq_t sn_setup_msi_irq;
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#define platform_pci_legacy_read sn_pci_legacy_read
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#define platform_pci_legacy_write sn_pci_legacy_write
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#define platform_dma_init sn_dma_init
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#define platform_dma_alloc_coherent sn_dma_alloc_coherent
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#define platform_dma_free_coherent sn_dma_free_coherent
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#define platform_dma_map_single_attrs sn_dma_map_single_attrs
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#define platform_dma_unmap_single_attrs sn_dma_unmap_single_attrs
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#define platform_dma_map_sg_attrs sn_dma_map_sg_attrs
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#define platform_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs
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#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu
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#define platform_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu
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#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device
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#define platform_dma_sync_sg_for_device sn_dma_sync_sg_for_device
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#define platform_dma_mapping_error sn_dma_mapping_error
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#define platform_dma_supported sn_dma_supported
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#define platform_migrate sn_migrate
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#define platform_kernel_launch_event sn_kernel_launch_event
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#ifdef CONFIG_PCI_MSI
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