Merge branches 'pm-cpufreq', 'pm-cpuidle' and 'acpi-cppc'
* pm-cpufreq: cpufreq: dt: Drop stale comment cpufreq: intel_pstate: Documenation for structures cpufreq: intel_pstate: fix inconsistency in setting policy limits intel_pstate: Avoid extra invocation of intel_pstate_sample() intel_pstate: Do not set utilization update hook too early * pm-cpuidle: intel_idle: Add KBL support intel_idle: Add SKX support intel_idle: Clean up all registered devices on exit. intel_idle: Propagate hot plug errors. intel_idle: Don't overreact to a cpuidle registration failure. intel_idle: Setup the timer broadcast only on successful driver load. intel_idle: Avoid a double free of the per-CPU data. intel_idle: Fix dangling registration on error path. intel_idle: Fix deallocation order on the driver exit path. intel_idle: Remove redundant initialization calls. intel_idle: Fix a helper function's return value. intel_idle: remove useless return from void function. * acpi-cppc: mailbox: pcc: Don't access an unmapped memory address space
This commit is contained in:
commit
fa81e66ec8
4 changed files with 258 additions and 52 deletions
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@ -4,9 +4,6 @@
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* Copyright (C) 2014 Linaro.
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* Viresh Kumar <viresh.kumar@linaro.org>
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*
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* The OPP code in function set_target() is reused from
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* drivers/cpufreq/omap-cpufreq.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
|
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* published by the Free Software Foundation.
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|
|
|
@ -64,6 +64,25 @@ static inline int ceiling_fp(int32_t x)
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return ret;
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}
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/**
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* struct sample - Store performance sample
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* @core_pct_busy: Ratio of APERF/MPERF in percent, which is actual
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* performance during last sample period
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* @busy_scaled: Scaled busy value which is used to calculate next
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* P state. This can be different than core_pct_busy
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* to account for cpu idle period
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* @aperf: Difference of actual performance frequency clock count
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* read from APERF MSR between last and current sample
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* @mperf: Difference of maximum performance frequency clock count
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* read from MPERF MSR between last and current sample
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* @tsc: Difference of time stamp counter between last and
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* current sample
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* @freq: Effective frequency calculated from APERF/MPERF
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* @time: Current time from scheduler
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*
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* This structure is used in the cpudata structure to store performance sample
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* data for choosing next P State.
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*/
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struct sample {
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int32_t core_pct_busy;
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int32_t busy_scaled;
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@ -74,6 +93,20 @@ struct sample {
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u64 time;
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};
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/**
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* struct pstate_data - Store P state data
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* @current_pstate: Current requested P state
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* @min_pstate: Min P state possible for this platform
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* @max_pstate: Max P state possible for this platform
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* @max_pstate_physical:This is physical Max P state for a processor
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* This can be higher than the max_pstate which can
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* be limited by platform thermal design power limits
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* @scaling: Scaling factor to convert frequency to cpufreq
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* frequency units
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* @turbo_pstate: Max Turbo P state possible for this platform
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*
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* Stores the per cpu model P state limits and current P state.
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*/
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struct pstate_data {
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int current_pstate;
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int min_pstate;
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@ -83,6 +116,19 @@ struct pstate_data {
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int turbo_pstate;
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};
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/**
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* struct vid_data - Stores voltage information data
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* @min: VID data for this platform corresponding to
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* the lowest P state
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* @max: VID data corresponding to the highest P State.
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* @turbo: VID data for turbo P state
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* @ratio: Ratio of (vid max - vid min) /
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* (max P state - Min P State)
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*
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* Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
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* This data is used in Atom platforms, where in addition to target P state,
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* the voltage data needs to be specified to select next P State.
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*/
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struct vid_data {
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int min;
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int max;
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@ -90,6 +136,18 @@ struct vid_data {
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int32_t ratio;
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};
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/**
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* struct _pid - Stores PID data
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* @setpoint: Target set point for busyness or performance
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* @integral: Storage for accumulated error values
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* @p_gain: PID proportional gain
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* @i_gain: PID integral gain
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* @d_gain: PID derivative gain
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* @deadband: PID deadband
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* @last_err: Last error storage for integral part of PID calculation
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*
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* Stores PID coefficients and last error for PID controller.
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*/
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struct _pid {
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int setpoint;
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int32_t integral;
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|
@ -100,6 +158,23 @@ struct _pid {
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int32_t last_err;
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};
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/**
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* struct cpudata - Per CPU instance data storage
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* @cpu: CPU number for this instance data
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* @update_util: CPUFreq utility callback information
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* @pstate: Stores P state limits for this CPU
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* @vid: Stores VID limits for this CPU
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* @pid: Stores PID parameters for this CPU
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* @last_sample_time: Last Sample time
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* @prev_aperf: Last APERF value read from APERF MSR
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* @prev_mperf: Last MPERF value read from MPERF MSR
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* @prev_tsc: Last timestamp counter (TSC) value
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* @prev_cummulative_iowait: IO Wait time difference from last and
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* current sample
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* @sample: Storage for storing last Sample data
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*
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* This structure stores per CPU instance data for all CPUs.
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*/
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struct cpudata {
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int cpu;
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|
@ -118,6 +193,19 @@ struct cpudata {
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};
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static struct cpudata **all_cpu_data;
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/**
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* struct pid_adjust_policy - Stores static PID configuration data
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* @sample_rate_ms: PID calculation sample rate in ms
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* @sample_rate_ns: Sample rate calculation in ns
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* @deadband: PID deadband
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* @setpoint: PID Setpoint
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* @p_gain_pct: PID proportional gain
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* @i_gain_pct: PID integral gain
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* @d_gain_pct: PID derivative gain
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*
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* Stores per CPU model static PID configuration data.
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*/
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struct pstate_adjust_policy {
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int sample_rate_ms;
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s64 sample_rate_ns;
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|
@ -128,6 +216,20 @@ struct pstate_adjust_policy {
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int i_gain_pct;
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};
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/**
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* struct pstate_funcs - Per CPU model specific callbacks
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* @get_max: Callback to get maximum non turbo effective P state
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* @get_max_physical: Callback to get maximum non turbo physical P state
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* @get_min: Callback to get minimum P state
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* @get_turbo: Callback to get turbo P state
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* @get_scaling: Callback to get frequency scaling factor
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* @get_val: Callback to convert P state to actual MSR write value
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* @get_vid: Callback to get VID data for Atom platforms
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* @get_target_pstate: Callback to a function to calculate next P state to use
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*
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* Core and Atom CPU models have different way to get P State limits. This
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* structure is used to store those callbacks.
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*/
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struct pstate_funcs {
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int (*get_max)(void);
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int (*get_max_physical)(void);
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|
@ -139,6 +241,11 @@ struct pstate_funcs {
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int32_t (*get_target_pstate)(struct cpudata *);
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};
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/**
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* struct cpu_defaults- Per CPU model default config data
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* @pid_policy: PID config data
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* @funcs: Callback function data
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*/
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struct cpu_defaults {
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struct pstate_adjust_policy pid_policy;
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struct pstate_funcs funcs;
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|
@ -151,6 +258,34 @@ static struct pstate_adjust_policy pid_params;
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static struct pstate_funcs pstate_funcs;
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static int hwp_active;
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/**
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* struct perf_limits - Store user and policy limits
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* @no_turbo: User requested turbo state from intel_pstate sysfs
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* @turbo_disabled: Platform turbo status either from msr
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* MSR_IA32_MISC_ENABLE or when maximum available pstate
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* matches the maximum turbo pstate
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* @max_perf_pct: Effective maximum performance limit in percentage, this
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* is minimum of either limits enforced by cpufreq policy
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* or limits from user set limits via intel_pstate sysfs
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* @min_perf_pct: Effective minimum performance limit in percentage, this
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* is maximum of either limits enforced by cpufreq policy
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* or limits from user set limits via intel_pstate sysfs
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* @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
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* This value is used to limit max pstate
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* @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
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* This value is used to limit min pstate
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* @max_policy_pct: The maximum performance in percentage enforced by
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* cpufreq setpolicy interface
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* @max_sysfs_pct: The maximum performance in percentage enforced by
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* intel pstate sysfs interface
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* @min_policy_pct: The minimum performance in percentage enforced by
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* cpufreq setpolicy interface
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* @min_sysfs_pct: The minimum performance in percentage enforced by
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* intel pstate sysfs interface
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*
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* Storage for user and policy defined limits.
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*/
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struct perf_limits {
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int no_turbo;
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int turbo_disabled;
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|
@ -910,7 +1045,14 @@ static inline bool intel_pstate_sample(struct cpudata *cpu, u64 time)
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cpu->prev_aperf = aperf;
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cpu->prev_mperf = mperf;
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cpu->prev_tsc = tsc;
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return true;
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/*
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* First time this function is invoked in a given cycle, all of the
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* previous sample data fields are equal to zero or stale and they must
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* be populated with meaningful numbers for things to work, so assume
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* that sample.time will always be reset before setting the utilization
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* update hook and make the caller skip the sample then.
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*/
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return !!cpu->last_sample_time;
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}
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static inline int32_t get_avg_frequency(struct cpudata *cpu)
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|
@ -984,8 +1126,7 @@ static inline int32_t get_target_pstate_use_performance(struct cpudata *cpu)
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* enough period of time to adjust our busyness.
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*/
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duration_ns = cpu->sample.time - cpu->last_sample_time;
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if ((s64)duration_ns > pid_params.sample_rate_ns * 3
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&& cpu->last_sample_time > 0) {
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if ((s64)duration_ns > pid_params.sample_rate_ns * 3) {
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sample_ratio = div_fp(int_tofp(pid_params.sample_rate_ns),
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int_tofp(duration_ns));
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core_busy = mul_fp(core_busy, sample_ratio);
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|
@ -1100,10 +1241,8 @@ static int intel_pstate_init_cpu(unsigned int cpunum)
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intel_pstate_get_cpu_pstates(cpu);
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intel_pstate_busy_pid_reset(cpu);
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intel_pstate_sample(cpu, 0);
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cpu->update_util.func = intel_pstate_update_util;
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cpufreq_set_update_util_data(cpunum, &cpu->update_util);
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pr_debug("intel_pstate: controlling: cpu %d\n", cpunum);
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|
@ -1122,22 +1261,54 @@ static unsigned int intel_pstate_get(unsigned int cpu_num)
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return get_avg_frequency(cpu);
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}
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static void intel_pstate_set_update_util_hook(unsigned int cpu_num)
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{
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struct cpudata *cpu = all_cpu_data[cpu_num];
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/* Prevent intel_pstate_update_util() from using stale data. */
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cpu->sample.time = 0;
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cpufreq_set_update_util_data(cpu_num, &cpu->update_util);
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}
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static void intel_pstate_clear_update_util_hook(unsigned int cpu)
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{
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cpufreq_set_update_util_data(cpu, NULL);
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synchronize_sched();
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}
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static void intel_pstate_set_performance_limits(struct perf_limits *limits)
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{
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limits->no_turbo = 0;
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limits->turbo_disabled = 0;
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limits->max_perf_pct = 100;
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limits->max_perf = int_tofp(1);
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limits->min_perf_pct = 100;
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limits->min_perf = int_tofp(1);
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limits->max_policy_pct = 100;
|
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limits->max_sysfs_pct = 100;
|
||||
limits->min_policy_pct = 0;
|
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limits->min_sysfs_pct = 0;
|
||||
}
|
||||
|
||||
static int intel_pstate_set_policy(struct cpufreq_policy *policy)
|
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{
|
||||
if (!policy->cpuinfo.max_freq)
|
||||
return -ENODEV;
|
||||
|
||||
if (policy->policy == CPUFREQ_POLICY_PERFORMANCE &&
|
||||
policy->max >= policy->cpuinfo.max_freq) {
|
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pr_debug("intel_pstate: set performance\n");
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intel_pstate_clear_update_util_hook(policy->cpu);
|
||||
|
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if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
|
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limits = &performance_limits;
|
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if (hwp_active)
|
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intel_pstate_hwp_set(policy->cpus);
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return 0;
|
||||
if (policy->max >= policy->cpuinfo.max_freq) {
|
||||
pr_debug("intel_pstate: set performance\n");
|
||||
intel_pstate_set_performance_limits(limits);
|
||||
goto out;
|
||||
}
|
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} else {
|
||||
pr_debug("intel_pstate: set powersave\n");
|
||||
limits = &powersave_limits;
|
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}
|
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|
||||
pr_debug("intel_pstate: set powersave\n");
|
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limits = &powersave_limits;
|
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limits->min_policy_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
|
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limits->min_policy_pct = clamp_t(int, limits->min_policy_pct, 0 , 100);
|
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limits->max_policy_pct = DIV_ROUND_UP(policy->max * 100,
|
||||
|
@ -1163,6 +1334,9 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy)
|
|||
limits->max_perf = div_fp(int_tofp(limits->max_perf_pct),
|
||||
int_tofp(100));
|
||||
|
||||
out:
|
||||
intel_pstate_set_update_util_hook(policy->cpu);
|
||||
|
||||
if (hwp_active)
|
||||
intel_pstate_hwp_set(policy->cpus);
|
||||
|
||||
|
@ -1187,8 +1361,7 @@ static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
|
|||
|
||||
pr_debug("intel_pstate: CPU %d exiting\n", cpu_num);
|
||||
|
||||
cpufreq_set_update_util_data(cpu_num, NULL);
|
||||
synchronize_sched();
|
||||
intel_pstate_clear_update_util_hook(cpu_num);
|
||||
|
||||
if (hwp_active)
|
||||
return;
|
||||
|
@ -1455,8 +1628,7 @@ static int __init intel_pstate_init(void)
|
|||
get_online_cpus();
|
||||
for_each_online_cpu(cpu) {
|
||||
if (all_cpu_data[cpu]) {
|
||||
cpufreq_set_update_util_data(cpu, NULL);
|
||||
synchronize_sched();
|
||||
intel_pstate_clear_update_util_hook(cpu);
|
||||
kfree(all_cpu_data[cpu]);
|
||||
}
|
||||
}
|
||||
|
|
|
@ -660,6 +660,35 @@ static struct cpuidle_state skl_cstates[] = {
|
|||
.enter = NULL }
|
||||
};
|
||||
|
||||
static struct cpuidle_state skx_cstates[] = {
|
||||
{
|
||||
.name = "C1-SKX",
|
||||
.desc = "MWAIT 0x00",
|
||||
.flags = MWAIT2flg(0x00),
|
||||
.exit_latency = 2,
|
||||
.target_residency = 2,
|
||||
.enter = &intel_idle,
|
||||
.enter_freeze = intel_idle_freeze, },
|
||||
{
|
||||
.name = "C1E-SKX",
|
||||
.desc = "MWAIT 0x01",
|
||||
.flags = MWAIT2flg(0x01),
|
||||
.exit_latency = 10,
|
||||
.target_residency = 20,
|
||||
.enter = &intel_idle,
|
||||
.enter_freeze = intel_idle_freeze, },
|
||||
{
|
||||
.name = "C6-SKX",
|
||||
.desc = "MWAIT 0x20",
|
||||
.flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
|
||||
.exit_latency = 133,
|
||||
.target_residency = 600,
|
||||
.enter = &intel_idle,
|
||||
.enter_freeze = intel_idle_freeze, },
|
||||
{
|
||||
.enter = NULL }
|
||||
};
|
||||
|
||||
static struct cpuidle_state atom_cstates[] = {
|
||||
{
|
||||
.name = "C1E-ATM",
|
||||
|
@ -818,8 +847,11 @@ static int cpu_hotplug_notify(struct notifier_block *n,
|
|||
* driver in this case
|
||||
*/
|
||||
dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
|
||||
if (!dev->registered)
|
||||
intel_idle_cpu_init(hotcpu);
|
||||
if (dev->registered)
|
||||
break;
|
||||
|
||||
if (intel_idle_cpu_init(hotcpu))
|
||||
return NOTIFY_BAD;
|
||||
|
||||
break;
|
||||
}
|
||||
|
@ -904,6 +936,10 @@ static const struct idle_cpu idle_cpu_skl = {
|
|||
.disable_promotion_to_c1e = true,
|
||||
};
|
||||
|
||||
static const struct idle_cpu idle_cpu_skx = {
|
||||
.state_table = skx_cstates,
|
||||
.disable_promotion_to_c1e = true,
|
||||
};
|
||||
|
||||
static const struct idle_cpu idle_cpu_avn = {
|
||||
.state_table = avn_cstates,
|
||||
|
@ -945,6 +981,9 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
|
|||
ICPU(0x56, idle_cpu_bdw),
|
||||
ICPU(0x4e, idle_cpu_skl),
|
||||
ICPU(0x5e, idle_cpu_skl),
|
||||
ICPU(0x8e, idle_cpu_skl),
|
||||
ICPU(0x9e, idle_cpu_skl),
|
||||
ICPU(0x55, idle_cpu_skx),
|
||||
ICPU(0x57, idle_cpu_knl),
|
||||
{}
|
||||
};
|
||||
|
@ -987,22 +1026,15 @@ static int __init intel_idle_probe(void)
|
|||
icpu = (const struct idle_cpu *)id->driver_data;
|
||||
cpuidle_state_table = icpu->state_table;
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
|
||||
lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
|
||||
else
|
||||
on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
|
||||
|
||||
pr_debug(PREFIX "v" INTEL_IDLE_VERSION
|
||||
" model 0x%X\n", boot_cpu_data.x86_model);
|
||||
|
||||
pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
|
||||
lapic_timer_reliable_states);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* intel_idle_cpuidle_devices_uninit()
|
||||
* unregister, free cpuidle_devices
|
||||
* Unregisters the cpuidle devices.
|
||||
*/
|
||||
static void intel_idle_cpuidle_devices_uninit(void)
|
||||
{
|
||||
|
@ -1013,9 +1045,6 @@ static void intel_idle_cpuidle_devices_uninit(void)
|
|||
dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
|
||||
cpuidle_unregister_device(dev);
|
||||
}
|
||||
|
||||
free_percpu(intel_idle_cpuidle_devices);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1111,7 +1140,7 @@ static void intel_idle_state_table_update(void)
|
|||
* intel_idle_cpuidle_driver_init()
|
||||
* allocate, initialize cpuidle_states
|
||||
*/
|
||||
static int __init intel_idle_cpuidle_driver_init(void)
|
||||
static void __init intel_idle_cpuidle_driver_init(void)
|
||||
{
|
||||
int cstate;
|
||||
struct cpuidle_driver *drv = &intel_idle_driver;
|
||||
|
@ -1163,18 +1192,10 @@ static int __init intel_idle_cpuidle_driver_init(void)
|
|||
drv->state_count += 1;
|
||||
}
|
||||
|
||||
if (icpu->auto_demotion_disable_flags)
|
||||
on_each_cpu(auto_demotion_disable, NULL, 1);
|
||||
|
||||
if (icpu->byt_auto_demotion_disable_flag) {
|
||||
wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
|
||||
wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
|
||||
}
|
||||
|
||||
if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
|
||||
on_each_cpu(c1e_promotion_disable, NULL, 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
@ -1193,7 +1214,6 @@ static int intel_idle_cpu_init(int cpu)
|
|||
|
||||
if (cpuidle_register_device(dev)) {
|
||||
pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
|
||||
intel_idle_cpuidle_devices_uninit();
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
|
@ -1218,40 +1238,51 @@ static int __init intel_idle_init(void)
|
|||
if (retval)
|
||||
return retval;
|
||||
|
||||
intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
|
||||
if (intel_idle_cpuidle_devices == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
intel_idle_cpuidle_driver_init();
|
||||
retval = cpuidle_register_driver(&intel_idle_driver);
|
||||
if (retval) {
|
||||
struct cpuidle_driver *drv = cpuidle_get_driver();
|
||||
printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
|
||||
drv ? drv->name : "none");
|
||||
free_percpu(intel_idle_cpuidle_devices);
|
||||
return retval;
|
||||
}
|
||||
|
||||
intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
|
||||
if (intel_idle_cpuidle_devices == NULL)
|
||||
return -ENOMEM;
|
||||
|
||||
cpu_notifier_register_begin();
|
||||
|
||||
for_each_online_cpu(i) {
|
||||
retval = intel_idle_cpu_init(i);
|
||||
if (retval) {
|
||||
intel_idle_cpuidle_devices_uninit();
|
||||
cpu_notifier_register_done();
|
||||
cpuidle_unregister_driver(&intel_idle_driver);
|
||||
free_percpu(intel_idle_cpuidle_devices);
|
||||
return retval;
|
||||
}
|
||||
}
|
||||
__register_cpu_notifier(&cpu_hotplug_notifier);
|
||||
|
||||
if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
|
||||
lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
|
||||
else
|
||||
on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
|
||||
|
||||
cpu_notifier_register_done();
|
||||
|
||||
pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
|
||||
lapic_timer_reliable_states);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit intel_idle_exit(void)
|
||||
{
|
||||
intel_idle_cpuidle_devices_uninit();
|
||||
cpuidle_unregister_driver(&intel_idle_driver);
|
||||
struct cpuidle_device *dev;
|
||||
int i;
|
||||
|
||||
cpu_notifier_register_begin();
|
||||
|
||||
|
@ -1259,9 +1290,15 @@ static void __exit intel_idle_exit(void)
|
|||
on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
|
||||
__unregister_cpu_notifier(&cpu_hotplug_notifier);
|
||||
|
||||
for_each_possible_cpu(i) {
|
||||
dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
|
||||
cpuidle_unregister_device(dev);
|
||||
}
|
||||
|
||||
cpu_notifier_register_done();
|
||||
|
||||
return;
|
||||
cpuidle_unregister_driver(&intel_idle_driver);
|
||||
free_percpu(intel_idle_cpuidle_devices);
|
||||
}
|
||||
|
||||
module_init(intel_idle_init);
|
||||
|
|
|
@ -361,8 +361,6 @@ static int __init acpi_pcc_probe(void)
|
|||
struct acpi_generic_address *db_reg;
|
||||
struct acpi_pcct_hw_reduced *pcct_ss;
|
||||
pcc_mbox_channels[i].con_priv = pcct_entry;
|
||||
pcct_entry = (struct acpi_subtable_header *)
|
||||
((unsigned long) pcct_entry + pcct_entry->length);
|
||||
|
||||
/* If doorbell is in system memory cache the virt address */
|
||||
pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
|
||||
|
@ -370,6 +368,8 @@ static int __init acpi_pcc_probe(void)
|
|||
if (db_reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)
|
||||
pcc_doorbell_vaddr[i] = acpi_os_ioremap(db_reg->address,
|
||||
db_reg->bit_width/8);
|
||||
pcct_entry = (struct acpi_subtable_header *)
|
||||
((unsigned long) pcct_entry + pcct_entry->length);
|
||||
}
|
||||
|
||||
pcc_mbox_ctrl.num_chans = count;
|
||||
|
|
Loading…
Reference in a new issue