[SCSI] qla2xxx: Use PCI-X/PCI-Express read control interfaces.
Original from Peter Oruba <peter.oruba@amd.com>. Additional cleanups included. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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1 changed files with 4 additions and 21 deletions
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@ -255,7 +255,6 @@ qla24xx_pci_config(scsi_qla_host_t *ha)
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uint32_t d;
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unsigned long flags = 0;
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struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
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int pcix_cmd_reg, pcie_dctl_reg;
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pci_set_master(ha->pdev);
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ret = pci_set_mwi(ha->pdev);
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@ -268,28 +267,12 @@ qla24xx_pci_config(scsi_qla_host_t *ha)
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pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
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/* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
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pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
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if (pcix_cmd_reg) {
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uint16_t pcix_cmd;
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pcix_cmd_reg += PCI_X_CMD;
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pci_read_config_word(ha->pdev, pcix_cmd_reg, &pcix_cmd);
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pcix_cmd &= ~PCI_X_CMD_MAX_READ;
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pcix_cmd |= 0x0008;
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pci_write_config_word(ha->pdev, pcix_cmd_reg, pcix_cmd);
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}
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if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
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pcix_set_mmrbc(ha->pdev, 2048);
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/* PCIe -- adjust Maximum Read Request Size (2048). */
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pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
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if (pcie_dctl_reg) {
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uint16_t pcie_dctl;
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pcie_dctl_reg += PCI_EXP_DEVCTL;
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pci_read_config_word(ha->pdev, pcie_dctl_reg, &pcie_dctl);
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pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
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pcie_dctl |= 0x4000;
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pci_write_config_word(ha->pdev, pcie_dctl_reg, pcie_dctl);
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}
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if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
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pcie_set_readrq(ha->pdev, 2048);
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/* Reset expansion ROM address decode enable */
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pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
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