mg_disk: use defines from <linux/ata.h>
While at it: - remove MG_REG_HEAD_MUST_BE_ON define - remove MG_REG_CTRL_INTR_ENABLE define - remove MG_REG_HEAD_LBA_MODE define - remove unused defines Cc: unsik Kim <donari75@gmail.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
This commit is contained in:
Bartlomiej Zolnierkiewicz
Jens Axboe
parent
8a11a789c3
commit
f68adec3c7
1 changed files with 43 additions and 101 deletions
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@ -51,51 +51,10 @@
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#define MG_REG_DRV_CTRL (MG_REG_OFFSET + 0x10)
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#define MG_REG_BURST_CTRL (MG_REG_OFFSET + 0x12)
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/* "Drive Select/Head Register" bit values */
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#define MG_REG_HEAD_MUST_BE_ON 0xA0 /* These 2 bits are always on */
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#define MG_REG_HEAD_DRIVE_MASTER (0x00 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_DRIVE_SLAVE (0x10 | MG_REG_HEAD_MUST_BE_ON)
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#define MG_REG_HEAD_LBA_MODE (0x40 | MG_REG_HEAD_MUST_BE_ON)
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/* "Device Control Register" bit values */
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#define MG_REG_CTRL_INTR_ENABLE 0x0
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#define MG_REG_CTRL_INTR_DISABLE (0x1<<1)
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#define MG_REG_CTRL_RESET (0x1<<2)
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_HIGH 0x0
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#define MG_REG_CTRL_INTR_POLA_ACTIVE_LOW (0x1<<4)
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_LOW 0x0
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#define MG_REG_CTRL_DPD_POLA_ACTIVE_HIGH (0x1<<5)
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#define MG_REG_CTRL_DPD_DISABLE 0x0
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#define MG_REG_CTRL_DPD_ENABLE (0x1<<6)
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/* Status register bit */
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/* error bit in status register */
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#define MG_REG_STATUS_BIT_ERROR 0x01
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/* corrected error in status register */
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#define MG_REG_STATUS_BIT_CORRECTED_ERROR 0x04
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/* data request bit in status register */
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#define MG_REG_STATUS_BIT_DATA_REQ 0x08
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/* DSC - Drive Seek Complete */
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#define MG_REG_STATUS_BIT_SEEK_DONE 0x10
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/* DWF - Drive Write Fault */
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#define MG_REG_STATUS_BIT_WRITE_FAULT 0x20
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#define MG_REG_STATUS_BIT_READY 0x40
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#define MG_REG_STATUS_BIT_BUSY 0x80
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/* handy status */
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#define MG_STAT_READY (MG_REG_STATUS_BIT_READY | MG_REG_STATUS_BIT_SEEK_DONE)
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#define MG_READY_OK(s) (((s) & (MG_STAT_READY | \
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(MG_REG_STATUS_BIT_BUSY | \
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MG_REG_STATUS_BIT_WRITE_FAULT | \
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MG_REG_STATUS_BIT_ERROR))) == MG_STAT_READY)
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/* Error register */
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#define MG_REG_ERR_AMNF 0x01
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#define MG_REG_ERR_ABRT 0x04
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#define MG_REG_ERR_IDNF 0x10
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#define MG_REG_ERR_UNC 0x40
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#define MG_REG_ERR_BBK 0x80
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#define MG_STAT_READY (ATA_DRDY | ATA_DSC)
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#define MG_READY_OK(s) (((s) & (MG_STAT_READY | (ATA_BUSY | ATA_DF | \
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ATA_ERR))) == MG_STAT_READY)
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/* error code for others */
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#define MG_ERR_NONE 0
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@ -225,41 +184,39 @@ static void mg_dump_status(const char *msg, unsigned int stat,
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}
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printk(KERN_ERR "%s: %s: status=0x%02x { ", name, msg, stat & 0xff);
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if (stat & MG_REG_STATUS_BIT_BUSY)
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if (stat & ATA_BUSY)
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printk("Busy ");
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if (stat & MG_REG_STATUS_BIT_READY)
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if (stat & ATA_DRDY)
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printk("DriveReady ");
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if (stat & MG_REG_STATUS_BIT_WRITE_FAULT)
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if (stat & ATA_DF)
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printk("WriteFault ");
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if (stat & MG_REG_STATUS_BIT_SEEK_DONE)
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if (stat & ATA_DSC)
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printk("SeekComplete ");
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if (stat & MG_REG_STATUS_BIT_DATA_REQ)
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if (stat & ATA_DRQ)
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printk("DataRequest ");
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if (stat & MG_REG_STATUS_BIT_CORRECTED_ERROR)
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if (stat & ATA_CORR)
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printk("CorrectedError ");
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if (stat & MG_REG_STATUS_BIT_ERROR)
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if (stat & ATA_ERR)
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printk("Error ");
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printk("}\n");
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if ((stat & MG_REG_STATUS_BIT_ERROR) == 0) {
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if ((stat & ATA_ERR) == 0) {
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host->error = 0;
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} else {
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host->error = inb((unsigned long)host->dev_base + MG_REG_ERROR);
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printk(KERN_ERR "%s: %s: error=0x%02x { ", name, msg,
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host->error & 0xff);
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if (host->error & MG_REG_ERR_BBK)
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if (host->error & ATA_BBK)
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printk("BadSector ");
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if (host->error & MG_REG_ERR_UNC)
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if (host->error & ATA_UNC)
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printk("UncorrectableError ");
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if (host->error & MG_REG_ERR_IDNF)
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if (host->error & ATA_IDNF)
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printk("SectorIdNotFound ");
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if (host->error & MG_REG_ERR_ABRT)
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if (host->error & ATA_ABORTED)
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printk("DriveStatusError ");
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if (host->error & MG_REG_ERR_AMNF)
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if (host->error & ATA_AMNF)
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printk("AddrMarkNotFound ");
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printk("}");
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if (host->error &
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(MG_REG_ERR_BBK | MG_REG_ERR_UNC |
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MG_REG_ERR_IDNF | MG_REG_ERR_AMNF)) {
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if (host->error & (ATA_BBK | ATA_UNC | ATA_IDNF | ATA_AMNF)) {
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if (host->breq) {
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req = elv_next_request(host->breq);
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if (req)
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@ -284,12 +241,12 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
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do {
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cur_jiffies = jiffies;
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if (status & MG_REG_STATUS_BIT_BUSY) {
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if (expect == MG_REG_STATUS_BIT_BUSY)
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if (status & ATA_BUSY) {
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if (expect == ATA_BUSY)
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break;
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} else {
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/* Check the error condition! */
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if (status & MG_REG_STATUS_BIT_ERROR) {
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if (status & ATA_ERR) {
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mg_dump_status("mg_wait", status, host);
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break;
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}
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@ -298,8 +255,8 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
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if (MG_READY_OK(status))
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break;
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if (expect == MG_REG_STATUS_BIT_DATA_REQ)
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if (status & MG_REG_STATUS_BIT_DATA_REQ)
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if (expect == ATA_DRQ)
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if (status & ATA_DRQ)
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break;
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}
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if (!msec) {
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@ -404,12 +361,10 @@ static int mg_get_disk_id(struct mg_host *host)
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char serial[ATA_ID_SERNO_LEN + 1];
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if (!prv_data->use_polling)
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outb(MG_REG_CTRL_INTR_DISABLE,
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(unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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outb(MG_CMD_ID, (unsigned long)host->dev_base + MG_REG_COMMAND);
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err = mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, MG_TMAX_WAIT_RD_DRQ);
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err = mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_RD_DRQ);
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if (err)
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return err;
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@ -449,8 +404,7 @@ static int mg_get_disk_id(struct mg_host *host)
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host->n_sectors, host->nres_sectors);
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if (!prv_data->use_polling)
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outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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return err;
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}
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@ -464,7 +418,7 @@ static int mg_disk_init(struct mg_host *host)
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/* hdd rst low */
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gpio_set_value(host->rst, 0);
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err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, MG_TMAX_RST_TO_BUSY);
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err = mg_wait(host, ATA_BUSY, MG_TMAX_RST_TO_BUSY);
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if (err)
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return err;
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@ -475,17 +429,14 @@ static int mg_disk_init(struct mg_host *host)
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return err;
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/* soft reset on */
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outb(MG_REG_CTRL_RESET |
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(prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE :
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MG_REG_CTRL_INTR_ENABLE),
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outb(ATA_SRST | (prv_data->use_polling ? ATA_NIEN : 0),
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(unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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err = mg_wait(host, MG_REG_STATUS_BIT_BUSY, MG_TMAX_RST_TO_BUSY);
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err = mg_wait(host, ATA_BUSY, MG_TMAX_RST_TO_BUSY);
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if (err)
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return err;
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/* soft reset off */
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outb(prv_data->use_polling ? MG_REG_CTRL_INTR_DISABLE :
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MG_REG_CTRL_INTR_ENABLE,
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outb(prv_data->use_polling ? ATA_NIEN : 0,
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(unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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err = mg_wait(host, MG_STAT_READY, MG_TMAX_SWRST_TO_RDY);
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if (err)
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@ -531,7 +482,7 @@ static unsigned int mg_out(struct mg_host *host,
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MG_REG_CYL_LOW);
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outb((u8)(sect_num >> 16), (unsigned long)host->dev_base +
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MG_REG_CYL_HIGH);
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outb((u8)((sect_num >> 24) | MG_REG_HEAD_LBA_MODE),
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outb((u8)((sect_num >> 24) | ATA_LBA | ATA_DEVICE_OBS),
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(unsigned long)host->dev_base + MG_REG_DRV_HEAD);
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outb(cmd, (unsigned long)host->dev_base + MG_REG_COMMAND);
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return MG_ERR_NONE;
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@ -552,8 +503,8 @@ static void mg_read(struct request *req)
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do {
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u16 *buff = (u16 *)req->buffer;
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if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ,
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MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) {
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if (mg_wait(host, ATA_DRQ,
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MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) {
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mg_bad_rw_intr(host);
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return;
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}
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@ -583,8 +534,7 @@ static void mg_write(struct request *req)
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do {
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u16 *buff = (u16 *)req->buffer;
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if (mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ,
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MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) {
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if (mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) {
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mg_bad_rw_intr(host);
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return;
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}
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@ -606,11 +556,11 @@ static void mg_read_intr(struct mg_host *host)
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/* check status */
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do {
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i = inb((unsigned long)host->dev_base + MG_REG_STATUS);
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if (i & MG_REG_STATUS_BIT_BUSY)
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if (i & ATA_BUSY)
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break;
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if (!MG_READY_OK(i))
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break;
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if (i & MG_REG_STATUS_BIT_DATA_REQ)
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if (i & ATA_DRQ)
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goto ok_to_read;
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} while (0);
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mg_dump_status("mg_read_intr", i, host);
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@ -655,11 +605,11 @@ static void mg_write_intr(struct mg_host *host)
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/* check status */
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do {
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i = inb((unsigned long)host->dev_base + MG_REG_STATUS);
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if (i & MG_REG_STATUS_BIT_BUSY)
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if (i & ATA_BUSY)
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break;
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if (!MG_READY_OK(i))
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break;
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if ((req->nr_sectors <= 1) || (i & MG_REG_STATUS_BIT_DATA_REQ))
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if ((req->nr_sectors <= 1) || (i & ATA_DRQ))
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goto ok_to_write;
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} while (0);
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mg_dump_status("mg_write_intr", i, host);
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@ -752,18 +702,15 @@ static unsigned int mg_issue_req(struct request *req,
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break;
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case WRITE:
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/* TODO : handler */
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outb(MG_REG_CTRL_INTR_DISABLE,
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(unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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if (mg_out(host, sect_num, sect_cnt, MG_CMD_WR, &mg_write_intr)
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!= MG_ERR_NONE) {
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mg_bad_rw_intr(host);
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return host->error;
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}
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del_timer(&host->timer);
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mg_wait(host, MG_REG_STATUS_BIT_DATA_REQ, MG_TMAX_WAIT_WR_DRQ);
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outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_WR_DRQ);
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outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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if (host->error) {
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mg_bad_rw_intr(host);
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return host->error;
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@ -849,9 +796,7 @@ static int mg_suspend(struct platform_device *plat_dev, pm_message_t state)
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return -EIO;
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if (!prv_data->use_polling)
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outb(MG_REG_CTRL_INTR_DISABLE,
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(unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(ATA_NIEN, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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outb(MG_CMD_SLEEP, (unsigned long)host->dev_base + MG_REG_COMMAND);
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/* wait until mflash deep sleep */
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@ -859,9 +804,7 @@ static int mg_suspend(struct platform_device *plat_dev, pm_message_t state)
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if (mg_wait(host, MG_STAT_READY, MG_TMAX_CONF_TO_CMD)) {
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if (!prv_data->use_polling)
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outb(MG_REG_CTRL_INTR_ENABLE,
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(unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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return -EIO;
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}
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@ -884,8 +827,7 @@ static int mg_resume(struct platform_device *plat_dev)
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return -EIO;
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if (!prv_data->use_polling)
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outb(MG_REG_CTRL_INTR_ENABLE, (unsigned long)host->dev_base +
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MG_REG_DRV_CTRL);
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outb(0, (unsigned long)host->dev_base + MG_REG_DRV_CTRL);
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return 0;
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}
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