ASoC: da7218: Correct BCLK inversion for DSP DAI format mode
By default the device latches data on the falling edge of the BCLK in DSP mode, whereas the expectation for normal BCLK is to latch on the rising edge. This updates the driver to invert the BCLK configuration for DSP mode, to align with expected behaviour. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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1 changed files with 37 additions and 10 deletions
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@ -1954,17 +1954,44 @@ static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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case SND_SOC_DAIFMT_LEFT_J:
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case SND_SOC_DAIFMT_RIGHT_J:
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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case SND_SOC_DAIFMT_NB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
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DA7218_DAI_CLK_POL_INV;
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break;
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default:
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return -EINVAL;
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}
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break;
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case SND_SOC_DAIFMT_NB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | DA7218_DAI_CLK_POL_INV;
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case SND_SOC_DAIFMT_DSP_B:
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
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DA7218_DAI_CLK_POL_INV;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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break;
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case SND_SOC_DAIFMT_IB_IF:
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dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
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break;
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default:
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return -EINVAL;
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}
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break;
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default:
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return -EINVAL;
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