IB/ipath: Support multiple simultaneous devices of different types
Prior to this change, the driver was not able to support a HT and PCIE card simultaneously present in the same machine. Signed-off-by: Bryan O'Sullivan <bryan.osullivan@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
parent
5659416207
commit
f62fe77ad2
7 changed files with 81 additions and 63 deletions
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@ -95,16 +95,6 @@ const char *ipath_ibcstatus_str[] = {
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"RecovIdle",
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};
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/*
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* These variables are initialized in the chip-specific files
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* but are defined here.
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*/
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u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
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u64 ipath_gpio_sda, ipath_gpio_scl;
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u64 infinipath_i_bitsextant;
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ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
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u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
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static void __devexit ipath_remove_one(struct pci_dev *);
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static int __devinit ipath_init_one(struct pci_dev *,
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const struct pci_device_id *);
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@ -100,9 +100,9 @@ static int i2c_gpio_set(struct ipath_devdata *dd,
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gpioval = &dd->ipath_gpio_out;
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
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if (line == i2c_line_scl)
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mask = ipath_gpio_scl;
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mask = dd->ipath_gpio_scl;
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else
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mask = ipath_gpio_sda;
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mask = dd->ipath_gpio_sda;
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if (new_line_state == i2c_line_high)
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/* tri-state the output rather than force high */
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@ -119,12 +119,12 @@ static int i2c_gpio_set(struct ipath_devdata *dd,
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write_val = 0x0UL;
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if (line == i2c_line_scl) {
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write_val <<= ipath_gpio_scl_num;
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*gpioval = *gpioval & ~(1UL << ipath_gpio_scl_num);
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write_val <<= dd->ipath_gpio_scl_num;
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*gpioval = *gpioval & ~(1UL << dd->ipath_gpio_scl_num);
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*gpioval |= write_val;
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} else {
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write_val <<= ipath_gpio_sda_num;
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*gpioval = *gpioval & ~(1UL << ipath_gpio_sda_num);
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write_val <<= dd->ipath_gpio_sda_num;
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*gpioval = *gpioval & ~(1UL << dd->ipath_gpio_sda_num);
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*gpioval |= write_val;
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}
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ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_out, *gpioval);
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@ -157,9 +157,9 @@ static int i2c_gpio_get(struct ipath_devdata *dd,
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extctrl);
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/* config line to be an input */
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if (line == i2c_line_scl)
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mask = ipath_gpio_scl;
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mask = dd->ipath_gpio_scl;
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else
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mask = ipath_gpio_sda;
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mask = dd->ipath_gpio_sda;
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write_val = read_val & ~mask;
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, write_val);
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read_val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_extstatus);
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@ -252,8 +252,8 @@ static const struct ipath_cregs ipath_ht_cregs = {
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};
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/* kr_intstatus, kr_intclear, kr_intmask bits */
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#define INFINIPATH_I_RCVURG_MASK 0x1FF
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#define INFINIPATH_I_RCVAVAIL_MASK 0x1FF
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#define INFINIPATH_I_RCVURG_MASK ((1U<<9)-1)
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#define INFINIPATH_I_RCVAVAIL_MASK ((1U<<9)-1)
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/* kr_hwerrclear, kr_hwerrmask, kr_hwerrstatus, bits */
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#define INFINIPATH_HWE_HTCMEMPARITYERR_SHIFT 0
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@ -457,10 +457,10 @@ static void ipath_ht_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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"(cleared)\n", (unsigned long long) hwerrs);
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dd->ipath_lasthwerror |= hwerrs;
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if (hwerrs & ~infinipath_hwe_bitsextant)
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if (hwerrs & ~dd->ipath_hwe_bitsextant)
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ipath_dev_err(dd, "hwerror interrupt with unknown errors "
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"%llx set\n", (unsigned long long)
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(hwerrs & ~infinipath_hwe_bitsextant));
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(hwerrs & ~dd->ipath_hwe_bitsextant));
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ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
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if (ctrl & INFINIPATH_C_FREEZEMODE) {
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@ -1058,21 +1058,21 @@ static void ipath_setup_ht_setextled(struct ipath_devdata *dd,
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ipath_write_kreg(dd, dd->ipath_kregs->kr_extctrl, extctl);
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}
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static void ipath_init_ht_variables(void)
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static void ipath_init_ht_variables(struct ipath_devdata *dd)
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{
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ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
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ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
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ipath_gpio_sda = IPATH_GPIO_SDA;
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ipath_gpio_scl = IPATH_GPIO_SCL;
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dd->ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
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dd->ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
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dd->ipath_gpio_sda = IPATH_GPIO_SDA;
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dd->ipath_gpio_scl = IPATH_GPIO_SCL;
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infinipath_i_bitsextant =
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dd->ipath_i_bitsextant =
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(INFINIPATH_I_RCVURG_MASK << INFINIPATH_I_RCVURG_SHIFT) |
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(INFINIPATH_I_RCVAVAIL_MASK <<
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INFINIPATH_I_RCVAVAIL_SHIFT) |
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INFINIPATH_I_ERROR | INFINIPATH_I_SPIOSENT |
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INFINIPATH_I_SPIOBUFAVAIL | INFINIPATH_I_GPIO;
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infinipath_e_bitsextant =
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dd->ipath_e_bitsextant =
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INFINIPATH_E_RFORMATERR | INFINIPATH_E_RVCRC |
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INFINIPATH_E_RICRC | INFINIPATH_E_RMINPKTLEN |
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INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RLONGPKTLEN |
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@ -1090,7 +1090,7 @@ static void ipath_init_ht_variables(void)
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INFINIPATH_E_INVALIDADDR | INFINIPATH_E_RESET |
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INFINIPATH_E_HARDWARE;
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infinipath_hwe_bitsextant =
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dd->ipath_hwe_bitsextant =
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(INFINIPATH_HWE_HTCMEMPARITYERR_MASK <<
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INFINIPATH_HWE_HTCMEMPARITYERR_SHIFT) |
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(INFINIPATH_HWE_TXEMEMPARITYERR_MASK <<
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@ -1119,8 +1119,8 @@ static void ipath_init_ht_variables(void)
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INFINIPATH_HWE_IBCBUSTOSPCPARITYERR |
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INFINIPATH_HWE_IBCBUSFRSPCPARITYERR;
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infinipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
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infinipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
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dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
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dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
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}
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/**
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@ -1585,5 +1585,5 @@ void ipath_init_iba6110_funcs(struct ipath_devdata *dd)
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* do very early init that is needed before ipath_f_bus is
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* called
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*/
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ipath_init_ht_variables();
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ipath_init_ht_variables(dd);
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}
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@ -263,8 +263,8 @@ static const struct ipath_cregs ipath_pe_cregs = {
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};
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/* kr_intstatus, kr_intclear, kr_intmask bits */
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#define INFINIPATH_I_RCVURG_MASK 0x1F
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#define INFINIPATH_I_RCVAVAIL_MASK 0x1F
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#define INFINIPATH_I_RCVURG_MASK ((1U<<5)-1)
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#define INFINIPATH_I_RCVAVAIL_MASK ((1U<<5)-1)
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/* kr_hwerrclear, kr_hwerrmask, kr_hwerrstatus, bits */
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#define INFINIPATH_HWE_PCIEMEMPARITYERR_MASK 0x000000000000003fULL
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@ -376,10 +376,10 @@ static void ipath_pe_handle_hwerrors(struct ipath_devdata *dd, char *msg,
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"(cleared)\n", (unsigned long long) hwerrs);
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dd->ipath_lasthwerror |= hwerrs;
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if (hwerrs & ~infinipath_hwe_bitsextant)
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if (hwerrs & ~dd->ipath_hwe_bitsextant)
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ipath_dev_err(dd, "hwerror interrupt with unknown errors "
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"%llx set\n", (unsigned long long)
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(hwerrs & ~infinipath_hwe_bitsextant));
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(hwerrs & ~dd->ipath_hwe_bitsextant));
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ctrl = ipath_read_kreg32(dd, dd->ipath_kregs->kr_control);
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if (ctrl & INFINIPATH_C_FREEZEMODE) {
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@ -865,19 +865,19 @@ static int ipath_setup_pe_config(struct ipath_devdata *dd,
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return 0;
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}
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static void ipath_init_pe_variables(void)
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static void ipath_init_pe_variables(struct ipath_devdata *dd)
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{
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/*
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* bits for selecting i2c direction and values,
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* used for I2C serial flash
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*/
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ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
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ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
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ipath_gpio_sda = IPATH_GPIO_SDA;
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ipath_gpio_scl = IPATH_GPIO_SCL;
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dd->ipath_gpio_sda_num = _IPATH_GPIO_SDA_NUM;
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dd->ipath_gpio_scl_num = _IPATH_GPIO_SCL_NUM;
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dd->ipath_gpio_sda = IPATH_GPIO_SDA;
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dd->ipath_gpio_scl = IPATH_GPIO_SCL;
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/* variables for sanity checking interrupt and errors */
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infinipath_hwe_bitsextant =
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dd->ipath_hwe_bitsextant =
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(INFINIPATH_HWE_RXEMEMPARITYERR_MASK <<
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INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT) |
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(INFINIPATH_HWE_PCIEMEMPARITYERR_MASK <<
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@ -895,13 +895,13 @@ static void ipath_init_pe_variables(void)
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INFINIPATH_HWE_SERDESPLLFAILED |
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INFINIPATH_HWE_IBCBUSTOSPCPARITYERR |
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INFINIPATH_HWE_IBCBUSFRSPCPARITYERR;
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infinipath_i_bitsextant =
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dd->ipath_i_bitsextant =
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(INFINIPATH_I_RCVURG_MASK << INFINIPATH_I_RCVURG_SHIFT) |
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(INFINIPATH_I_RCVAVAIL_MASK <<
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INFINIPATH_I_RCVAVAIL_SHIFT) |
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INFINIPATH_I_ERROR | INFINIPATH_I_SPIOSENT |
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INFINIPATH_I_SPIOBUFAVAIL | INFINIPATH_I_GPIO;
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infinipath_e_bitsextant =
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dd->ipath_e_bitsextant =
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INFINIPATH_E_RFORMATERR | INFINIPATH_E_RVCRC |
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INFINIPATH_E_RICRC | INFINIPATH_E_RMINPKTLEN |
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INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RLONGPKTLEN |
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@ -919,8 +919,8 @@ static void ipath_init_pe_variables(void)
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INFINIPATH_E_INVALIDADDR | INFINIPATH_E_RESET |
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INFINIPATH_E_HARDWARE;
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infinipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
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infinipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
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dd->ipath_i_rcvavail_mask = INFINIPATH_I_RCVAVAIL_MASK;
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dd->ipath_i_rcvurg_mask = INFINIPATH_I_RCVURG_MASK;
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}
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/* setup the MSI stuff again after a reset. I'd like to just call
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@ -1326,6 +1326,6 @@ void ipath_init_iba6120_funcs(struct ipath_devdata *dd)
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dd->ipath_kregs = &ipath_pe_kregs;
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dd->ipath_cregs = &ipath_pe_cregs;
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ipath_init_pe_variables();
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ipath_init_pe_variables(dd);
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}
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@ -480,10 +480,10 @@ static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
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dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
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}
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if (!noprint && (errs & ~infinipath_e_bitsextant))
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if (!noprint && (errs & ~dd->ipath_e_bitsextant))
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ipath_dev_err(dd, "error interrupt with unknown errors "
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"%llx set\n", (unsigned long long)
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(errs & ~infinipath_e_bitsextant));
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(errs & ~dd->ipath_e_bitsextant));
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if (errs & E_SUM_ERRS)
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ignore_this_time = handle_e_sum_errs(dd, errs);
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@ -805,9 +805,9 @@ static void handle_urcv(struct ipath_devdata *dd, u32 istat)
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int rcvdint = 0;
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portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
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infinipath_i_rcvavail_mask)
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dd->ipath_i_rcvavail_mask)
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| ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
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infinipath_i_rcvurg_mask);
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dd->ipath_i_rcvurg_mask);
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for (i = 1; i < dd->ipath_cfgports; i++) {
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struct ipath_portdata *pd = dd->ipath_pd[i];
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if (portr & (1 << i) && pd && pd->port_cnt &&
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@ -914,10 +914,10 @@ irqreturn_t ipath_intr(int irq, void *data, struct pt_regs *regs)
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if (unexpected)
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unexpected = 0;
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if (unlikely(istat & ~infinipath_i_bitsextant))
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if (unlikely(istat & ~dd->ipath_i_bitsextant))
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ipath_dev_err(dd,
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"interrupt with unknown interrupts %x set\n",
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istat & (u32) ~ infinipath_i_bitsextant);
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istat & (u32) ~ dd->ipath_i_bitsextant);
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else
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ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
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istat &= ~port0rbits;
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}
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if (istat & ((infinipath_i_rcvavail_mask <<
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if (istat & ((dd->ipath_i_rcvavail_mask <<
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INFINIPATH_I_RCVAVAIL_SHIFT)
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| (infinipath_i_rcvurg_mask <<
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| (dd->ipath_i_rcvurg_mask <<
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INFINIPATH_I_RCVURG_SHIFT)))
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handle_urcv(dd, istat);
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@ -533,6 +533,30 @@ struct ipath_devdata {
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u32 ipath_rxfc_unsupvl_errs;
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u32 ipath_overrun_thresh_errs;
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u32 ipath_lli_errs;
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/*
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* Not all devices managed by a driver instance are the same
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* type, so these fields must be per-device.
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*/
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u64 ipath_i_bitsextant;
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ipath_err_t ipath_e_bitsextant;
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ipath_err_t ipath_hwe_bitsextant;
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/*
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* Below should be computable from number of ports,
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* since they are never modified.
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*/
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u32 ipath_i_rcvavail_mask;
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u32 ipath_i_rcvurg_mask;
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/*
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* Register bits for selecting i2c direction and values, used for
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* I2C serial flash.
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*/
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u16 ipath_gpio_sda_num;
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u16 ipath_gpio_scl_num;
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u64 ipath_gpio_sda;
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u64 ipath_gpio_scl;
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};
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/* Private data for file operations */
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@ -316,6 +316,17 @@
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typedef u64 ipath_err_t;
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/* The following change with the type of device, so
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* need to be part of the ipath_devdata struct, or
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* we could have problems plugging in devices of
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* different types (e.g. one HT, one PCIE)
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* in one system, to be managed by one driver.
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* On the other hand, this file is may also be included
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* by other code, so leave the declarations here
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* temporarily. Minor footprint issue if common-model
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* linker used, none if C89+ linker used.
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*/
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/* mask of defined bits for various registers */
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extern u64 infinipath_i_bitsextant;
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extern ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
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@ -323,13 +334,6 @@ extern ipath_err_t infinipath_e_bitsextant, infinipath_hwe_bitsextant;
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/* masks that are different in various chips, or only exist in some chips */
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extern u32 infinipath_i_rcvavail_mask, infinipath_i_rcvurg_mask;
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/*
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* register bits for selecting i2c direction and values, used for I2C serial
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* flash
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*/
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extern u16 ipath_gpio_sda_num, ipath_gpio_scl_num;
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extern u64 ipath_gpio_sda, ipath_gpio_scl;
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/*
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* These are the infinipath general register numbers (not offsets).
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* The kernel registers are used directly, those beyond the kernel
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