KVM: irq ack notification
Based on a patch from: Ben-Ami Yassour <benami@il.ibm.com> which was based on a patch from: Amit Shah <amit.shah@qumranet.com> Notify IRQ acking on PIC/APIC emulation. The previous patch missed two things: - Edge triggered interrupts on IOAPIC - PIC reset with IRR/ISR set should be equivalent to ack (LAPIC probably needs something similar). Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> CC: Amit Shah <amit.shah@qumranet.com> CC: Ben-Ami Yassour <benami@il.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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6 changed files with 34 additions and 13 deletions
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@ -159,9 +159,10 @@ static inline void pic_intack(struct kvm_kpic_state *s, int irq)
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s->irr &= ~(1 << irq);
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}
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int kvm_pic_read_irq(struct kvm_pic *s)
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int kvm_pic_read_irq(struct kvm *kvm)
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{
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int irq, irq2, intno;
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struct kvm_pic *s = pic_irqchip(kvm);
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irq = pic_get_irq(&s->pics[0]);
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if (irq >= 0) {
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@ -187,12 +188,21 @@ int kvm_pic_read_irq(struct kvm_pic *s)
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intno = s->pics[0].irq_base + irq;
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}
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pic_update_irq(s);
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kvm_notify_acked_irq(kvm, irq);
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return intno;
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}
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void kvm_pic_reset(struct kvm_kpic_state *s)
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{
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int irq;
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struct kvm *kvm = s->pics_state->irq_request_opaque;
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for (irq = 0; irq < PIC_NUM_PINS; irq++) {
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if (!(s->imr & (1 << irq)) && (s->irr & (1 << irq) ||
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s->isr & (1 << irq)))
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kvm_notify_acked_irq(kvm, irq);
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}
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s->last_irr = 0;
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s->irr = 0;
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s->imr = 0;
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@ -72,7 +72,7 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
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if (kvm_apic_accept_pic_intr(v)) {
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s = pic_irqchip(v->kvm);
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s->output = 0; /* PIC */
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vector = kvm_pic_read_irq(s);
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vector = kvm_pic_read_irq(v->kvm);
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}
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}
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return vector;
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@ -63,11 +63,12 @@ struct kvm_pic {
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void *irq_request_opaque;
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int output; /* intr from master PIC */
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struct kvm_io_device dev;
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void (*ack_notifier)(void *opaque, int irq);
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};
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struct kvm_pic *kvm_create_pic(struct kvm *kvm);
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void kvm_pic_set_irq(void *opaque, int irq, int level);
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int kvm_pic_read_irq(struct kvm_pic *s);
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int kvm_pic_read_irq(struct kvm *kvm);
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void kvm_pic_update_irq(struct kvm_pic *s);
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static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
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@ -439,7 +439,7 @@ struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
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static void apic_set_eoi(struct kvm_lapic *apic)
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{
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int vector = apic_find_highest_isr(apic);
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int trigger_mode;
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/*
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* Not every write EOI will has corresponding ISR,
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* one example is when Kernel check timer on setup_IO_APIC
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@ -451,7 +451,10 @@ static void apic_set_eoi(struct kvm_lapic *apic)
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apic_update_ppr(apic);
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if (apic_test_and_clear_vector(vector, apic->regs + APIC_TMR))
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kvm_ioapic_update_eoi(apic->vcpu->kvm, vector);
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trigger_mode = IOAPIC_LEVEL_TRIG;
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else
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trigger_mode = IOAPIC_EDGE_TRIG;
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kvm_ioapic_update_eoi(apic->vcpu->kvm, vector, trigger_mode);
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}
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static void apic_send_ipi(struct kvm_lapic *apic)
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@ -39,6 +39,7 @@
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#include "ioapic.h"
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#include "lapic.h"
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#include "irq.h"
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#if 0
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#define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
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@ -285,26 +286,31 @@ void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
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}
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}
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static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int gsi)
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static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int gsi,
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int trigger_mode)
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{
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union ioapic_redir_entry *ent;
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ent = &ioapic->redirtbl[gsi];
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ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
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ent->fields.remote_irr = 0;
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if (!ent->fields.mask && (ioapic->irr & (1 << gsi)))
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ioapic_service(ioapic, gsi);
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kvm_notify_acked_irq(ioapic->kvm, gsi);
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if (trigger_mode == IOAPIC_LEVEL_TRIG) {
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ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
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ent->fields.remote_irr = 0;
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if (!ent->fields.mask && (ioapic->irr & (1 << gsi)))
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ioapic_service(ioapic, gsi);
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}
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}
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector)
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector, int trigger_mode)
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{
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struct kvm_ioapic *ioapic = kvm->arch.vioapic;
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int i;
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for (i = 0; i < IOAPIC_NUM_PINS; i++)
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if (ioapic->redirtbl[i].fields.vector == vector)
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__kvm_ioapic_update_eoi(ioapic, i);
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__kvm_ioapic_update_eoi(ioapic, i, trigger_mode);
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}
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static int ioapic_in_range(struct kvm_io_device *this, gpa_t addr,
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@ -58,6 +58,7 @@ struct kvm_ioapic {
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} redirtbl[IOAPIC_NUM_PINS];
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struct kvm_io_device dev;
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struct kvm *kvm;
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void (*ack_notifier)(void *opaque, int irq);
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};
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#ifdef DEBUG
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@ -87,7 +88,7 @@ static inline int irqchip_in_kernel(struct kvm *kvm)
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struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
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unsigned long bitmap);
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector);
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector, int trigger_mode);
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int kvm_ioapic_init(struct kvm *kvm);
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void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level);
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void kvm_ioapic_reset(struct kvm_ioapic *ioapic);
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