ASoC: fsl_ssi: refine ipg clock usage in this module
Check if ipg clock is in clock-names property, then we can move the ipg clock enable and disable operation to startup and shutdown, that is only enable ipg clock when ssi is working and keep clock is disabled when ssi is in idle. But when the checking is failed, remain the clock control as before. Tested-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Acked-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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cf4f7fc3e7
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f4a43caba7
1 changed files with 45 additions and 8 deletions
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@ -169,6 +169,7 @@ struct fsl_ssi_private {
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u8 i2s_mode;
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u8 i2s_mode;
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bool use_dma;
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bool use_dma;
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bool use_dual_fifo;
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bool use_dual_fifo;
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bool has_ipg_clk_name;
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unsigned int fifo_depth;
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unsigned int fifo_depth;
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struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
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struct fsl_ssi_rxtx_reg_val rxtx_reg_val;
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@ -530,6 +531,11 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct fsl_ssi_private *ssi_private =
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struct fsl_ssi_private *ssi_private =
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snd_soc_dai_get_drvdata(rtd->cpu_dai);
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snd_soc_dai_get_drvdata(rtd->cpu_dai);
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int ret;
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ret = clk_prepare_enable(ssi_private->clk);
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if (ret)
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return ret;
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/* When using dual fifo mode, it is safer to ensure an even period
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/* When using dual fifo mode, it is safer to ensure an even period
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* size. If appearing to an odd number while DMA always starts its
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* size. If appearing to an odd number while DMA always starts its
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@ -543,6 +549,21 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream,
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return 0;
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return 0;
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}
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}
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/**
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* fsl_ssi_shutdown: shutdown the SSI
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*
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*/
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static void fsl_ssi_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct fsl_ssi_private *ssi_private =
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snd_soc_dai_get_drvdata(rtd->cpu_dai);
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clk_disable_unprepare(ssi_private->clk);
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}
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/**
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/**
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* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
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* fsl_ssi_set_bclk - configure Digital Audio Interface bit clock
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*
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*
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@ -1043,6 +1064,7 @@ static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
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static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
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static const struct snd_soc_dai_ops fsl_ssi_dai_ops = {
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.startup = fsl_ssi_startup,
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.startup = fsl_ssi_startup,
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.shutdown = fsl_ssi_shutdown,
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.hw_params = fsl_ssi_hw_params,
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.hw_params = fsl_ssi_hw_params,
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.hw_free = fsl_ssi_hw_free,
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.hw_free = fsl_ssi_hw_free,
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.set_fmt = fsl_ssi_set_dai_fmt,
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.set_fmt = fsl_ssi_set_dai_fmt,
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@ -1168,17 +1190,22 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
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u32 dmas[4];
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u32 dmas[4];
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int ret;
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int ret;
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ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
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if (ssi_private->has_ipg_clk_name)
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ssi_private->clk = devm_clk_get(&pdev->dev, "ipg");
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else
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ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(ssi_private->clk)) {
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if (IS_ERR(ssi_private->clk)) {
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ret = PTR_ERR(ssi_private->clk);
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ret = PTR_ERR(ssi_private->clk);
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dev_err(&pdev->dev, "could not get clock: %d\n", ret);
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dev_err(&pdev->dev, "could not get clock: %d\n", ret);
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return ret;
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return ret;
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}
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}
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ret = clk_prepare_enable(ssi_private->clk);
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if (!ssi_private->has_ipg_clk_name) {
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if (ret) {
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ret = clk_prepare_enable(ssi_private->clk);
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dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
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if (ret) {
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return ret;
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dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
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return ret;
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}
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}
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}
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/* For those SLAVE implementations, we ingore non-baudclk cases
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/* For those SLAVE implementations, we ingore non-baudclk cases
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@ -1236,8 +1263,9 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
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return 0;
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return 0;
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error_pcm:
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error_pcm:
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clk_disable_unprepare(ssi_private->clk);
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if (!ssi_private->has_ipg_clk_name)
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clk_disable_unprepare(ssi_private->clk);
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return ret;
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return ret;
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}
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}
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@ -1246,7 +1274,8 @@ static void fsl_ssi_imx_clean(struct platform_device *pdev,
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{
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{
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if (!ssi_private->use_dma)
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if (!ssi_private->use_dma)
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imx_pcm_fiq_exit(pdev);
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imx_pcm_fiq_exit(pdev);
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clk_disable_unprepare(ssi_private->clk);
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if (!ssi_private->has_ipg_clk_name)
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clk_disable_unprepare(ssi_private->clk);
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}
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}
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static int fsl_ssi_probe(struct platform_device *pdev)
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static int fsl_ssi_probe(struct platform_device *pdev)
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@ -1321,8 +1350,16 @@ static int fsl_ssi_probe(struct platform_device *pdev)
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
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ret = of_property_match_string(np, "clock-names", "ipg");
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if (ret < 0) {
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ssi_private->has_ipg_clk_name = false;
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ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem,
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&fsl_ssi_regconfig);
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&fsl_ssi_regconfig);
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} else {
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ssi_private->has_ipg_clk_name = true;
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ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev,
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"ipg", iomem, &fsl_ssi_regconfig);
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}
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if (IS_ERR(ssi_private->regs)) {
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if (IS_ERR(ssi_private->regs)) {
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dev_err(&pdev->dev, "Failed to init register map\n");
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dev_err(&pdev->dev, "Failed to init register map\n");
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return PTR_ERR(ssi_private->regs);
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return PTR_ERR(ssi_private->regs);
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