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x86/ce4100: Fix pm_poweroff

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The CE4100 platform is currently missing a proper pm_poweroff
implementation leading to poweroff making the CPU spin forever
and the CE4100 platform does not enter a low-power mode where
the external Power Management Unit can properly power off the
system. Power off on this platform is implemented pretty much
like reboot, by writing to the SoC built-in 8051 microcontroller
mapped at I/O port 0xcf9, the value 0x4.

Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: rui.zhang@intel.com
Cc: alan@linux.intel.com
Link: http://lkml.kernel.org/r/1351518020-25556-2-git-send-email-ffainelli@freebox.fr
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Florian Fainelli 2012-10-29 14:40:18 +01:00 committed by Ingo Molnar
parent 4cf7e71869
commit f49f4ab95c
1 changed files with 14 additions and 0 deletions
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14
arch/x86/platform/ce4100/ce4100.c
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@ -27,6 +27,18 @@ static int ce4100_i8042_detect(void)
return 0;
}
/*
* The CE4100 platform has an internal 8051 Microcontroller which is
* responsible for signaling to the external Power Management Unit the
* intention to reset, reboot or power off the system. This 8051 device has
* its command register mapped at I/O port 0xcf9 and the value 0x4 is used
* to power off the system.
*/
static void ce4100_power_off(void)
{
outb(0x4, 0xcf9);
}
#ifdef CONFIG_SERIAL_8250
static unsigned int mem_serial_in(struct uart_port *p, int offset)
@ -143,4 +155,6 @@ void __init x86_ce4100_early_setup(void)
x86_init.pci.init_irq = sdv_pci_init;
x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
#endif
pm_power_off = ce4100_power_off;
}