powerpc/64s: Add support to mask perf interrupts and replay them
Two new bit mask field "IRQ_DISABLE_MASK_PMU" is introduced to support the masking of PMI and "IRQ_DISABLE_MASK_ALL" to aid interrupt masking checking. Couple of new irq #defs "PACA_IRQ_PMI" and "SOFTEN_VALUE_0xf0*" added to use in the exception code to check for PMI interrupts. In the masked_interrupt handler, for PMIs we reset the MSR[EE] and return. In the __check_irq_replay(), replay the PMI interrupt by calling performance_monitor_common handler. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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f14e953b19
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5 changed files with 31 additions and 11 deletions
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@ -518,6 +518,7 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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#define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
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#define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
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#define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
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#define SOFTEN_VALUE_0xf00 PACA_IRQ_PMI
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#define __SOFTEN_TEST(h, vec, bitmask) \
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lbz r10,PACAIRQSOFTMASK(r13); \
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@ -582,6 +583,10 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
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EXC_STD, SOFTEN_NOTEST_PR, bitmask)
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#define MASKABLE_RELON_EXCEPTION_PSERIES_OOL(vec, label, bitmask) \
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MASKABLE_EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_NOTEST_PR, vec, bitmask);\
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EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD);
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#define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label, bitmask) \
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_MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
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EXC_HV, SOFTEN_TEST_HV, bitmask)
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@ -27,12 +27,15 @@
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#define PACA_IRQ_DEC 0x08 /* Or FIT */
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#define PACA_IRQ_EE_EDGE 0x10 /* BookE only */
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#define PACA_IRQ_HMI 0x20
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#define PACA_IRQ_PMI 0x40
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/*
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* flags for paca->irq_soft_mask
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*/
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#define IRQS_ENABLED 0
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#define IRQS_DISABLED 1
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#define IRQS_DISABLED 1 /* local_irq_disable() interrupts */
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#define IRQS_PMI_DISABLED 2
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#define IRQS_ALL_DISABLED (IRQS_DISABLED | IRQS_PMI_DISABLED)
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#endif /* CONFIG_PPC64 */
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@ -152,13 +155,13 @@ static inline bool arch_irqs_disabled(void)
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#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
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#endif
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#define hard_irq_disable() do { \
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unsigned long flags; \
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__hard_irq_disable(); \
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flags = irq_soft_mask_set_return(IRQS_DISABLED); \
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
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if (!arch_irqs_disabled_flags(flags)) \
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trace_hardirqs_off(); \
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#define hard_irq_disable() do { \
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unsigned long flags; \
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__hard_irq_disable(); \
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flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED); \
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
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if (!arch_irqs_disabled_flags(flags)) \
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trace_hardirqs_off(); \
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} while(0)
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static inline bool lazy_irq_pending(void)
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@ -954,6 +954,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
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addi r3,r1,STACK_FRAME_OVERHEAD;
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bl do_IRQ
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b ret_from_except
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1: cmpwi cr0,r3,0xf00
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bne 1f
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addi r3,r1,STACK_FRAME_OVERHEAD;
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bl performance_monitor_exception
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b ret_from_except
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1: cmpwi cr0,r3,0xe60
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bne 1f
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addi r3,r1,STACK_FRAME_OVERHEAD;
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@ -1111,8 +1111,8 @@ EXC_REAL_NONE(0xee0, 0x20)
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EXC_VIRT_NONE(0x4ee0, 0x20)
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EXC_REAL_OOL(performance_monitor, 0xf00, 0x20)
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EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x20, 0xf00)
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EXC_REAL_OOL_MASKABLE(performance_monitor, 0xf00, 0x20, IRQS_PMI_DISABLED)
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EXC_VIRT_OOL_MASKABLE(performance_monitor, 0x4f00, 0x20, 0xf00, IRQS_PMI_DISABLED)
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TRAMP_KVM(PACA_EXGEN, 0xf00)
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EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
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@ -1723,6 +1723,8 @@ BEGIN_FTR_SECTION
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FTR_SECTION_ELSE
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beq hardware_interrupt_common
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ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_300)
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cmpwi r3,0xf00
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beq performance_monitor_common
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BEGIN_FTR_SECTION
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cmpwi r3,0xa00
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beq h_doorbell_common_msgclr
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@ -186,6 +186,11 @@ notrace unsigned int __check_irq_replay(void)
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return 0x900;
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}
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if (happened & PACA_IRQ_PMI) {
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local_paca->irq_happened &= ~PACA_IRQ_PMI;
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return 0xf00;
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}
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if (happened & PACA_IRQ_EE) {
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local_paca->irq_happened &= ~PACA_IRQ_EE;
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return 0x500;
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@ -272,7 +277,7 @@ notrace void arch_local_irq_restore(unsigned long mask)
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}
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#endif /* CONFIG_TRACE_IRQFLAGS */
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irq_soft_mask_set(IRQS_DISABLED);
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irq_soft_mask_set(IRQS_ALL_DISABLED);
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trace_hardirqs_off();
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/*
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