b43: Fix chip access validation for new devices
This fixes chip access validation for newer devices (4318 and up, I think) This patch fixes probing of a PCMCIA based 4318 device. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 30 additions and 15 deletions
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@ -50,6 +50,9 @@
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#define B43_MMIO_XMITSTAT_1 0x174
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#define B43_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */
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#define B43_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */
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#define B43_MMIO_TSF_CFP_REP 0x188
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#define B43_MMIO_TSF_CFP_START 0x18C
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#define B43_MMIO_TSF_CFP_MAXDUR 0x190
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/* 32-bit DMA */
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#define B43_MMIO_DMA32_BASE0 0x200
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@ -88,6 +91,8 @@
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#define B43_MMIO_RADIO_HWENABLED_LO 0x49A
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#define B43_MMIO_GPIO_CONTROL 0x49C
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#define B43_MMIO_GPIO_MASK 0x49E
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#define B43_MMIO_TSF_CFP_START_LOW 0x604
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#define B43_MMIO_TSF_CFP_START_HIGH 0x606
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#define B43_MMIO_TSF_0 0x632 /* core rev < 3 only */
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#define B43_MMIO_TSF_1 0x634 /* core rev < 3 only */
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#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
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@ -2408,32 +2408,42 @@ static void b43_periodic_tasks_setup(struct b43_wldev *dev)
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queue_delayed_work(dev->wl->hw->workqueue, work, 0);
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}
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/* Validate access to the chip (SHM) */
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/* Check if communication with the device works correctly. */
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static int b43_validate_chipaccess(struct b43_wldev *dev)
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{
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u32 value;
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u32 shm_backup;
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u32 v, backup;
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shm_backup = b43_shm_read32(dev, B43_SHM_SHARED, 0);
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b43_shm_write32(dev, B43_SHM_SHARED, 0, 0xAA5555AA);
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if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0xAA5555AA)
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goto error;
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backup = b43_shm_read32(dev, B43_SHM_SHARED, 0);
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/* Check for read/write and endianness problems. */
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b43_shm_write32(dev, B43_SHM_SHARED, 0, 0x55AAAA55);
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if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0x55AAAA55)
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goto error;
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b43_shm_write32(dev, B43_SHM_SHARED, 0, shm_backup);
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value = b43_read32(dev, B43_MMIO_MACCTL);
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if ((value | B43_MACCTL_GMODE) !=
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(B43_MACCTL_GMODE | B43_MACCTL_IHR_ENABLED))
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b43_shm_write32(dev, B43_SHM_SHARED, 0, 0xAA5555AA);
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if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0xAA5555AA)
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goto error;
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value = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
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if (value)
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b43_shm_write32(dev, B43_SHM_SHARED, 0, backup);
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if ((dev->dev->id.revision >= 3) && (dev->dev->id.revision <= 10)) {
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/* The 32bit register shadows the two 16bit registers
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* with update sideeffects. Validate this. */
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b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA);
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b43_write32(dev, B43_MMIO_TSF_CFP_START, 0xCCCCBBBB);
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if (b43_read16(dev, B43_MMIO_TSF_CFP_START_LOW) != 0xBBBB)
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goto error;
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if (b43_read16(dev, B43_MMIO_TSF_CFP_START_HIGH) != 0xCCCC)
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goto error;
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}
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b43_write32(dev, B43_MMIO_TSF_CFP_START, 0);
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v = b43_read32(dev, B43_MMIO_MACCTL);
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v |= B43_MACCTL_GMODE;
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if (v != (B43_MACCTL_GMODE | B43_MACCTL_IHR_ENABLED))
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goto error;
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return 0;
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error:
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error:
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b43err(dev->wl, "Failed to validate the chipaccess\n");
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return -ENODEV;
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}
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