ASoC: wm9081: Fix reading wrong register for setting VMID 2*240k
VMID Divider Enable and Select is controlled by BIT[2:1] of WM9081_VMID_CONTROL register (04h). Current code reads wrong register (WM9081_BIAS_CONTROL_1) for setting VMID 2*240k. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -818,7 +818,7 @@ static int wm9081_set_bias_level(struct snd_soc_codec *codec,
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}
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/* VMID 2*240k */
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reg = snd_soc_read(codec, WM9081_BIAS_CONTROL_1);
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reg = snd_soc_read(codec, WM9081_VMID_CONTROL);
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reg &= ~WM9081_VMID_SEL_MASK;
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reg |= 0x04;
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snd_soc_write(codec, WM9081_VMID_CONTROL, reg);
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