x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs
If host CPU is exposed to a guest the OSVW MSRs are not guaranteed to be present and a GP fault occurs. Thus checking the feature flag is essential. Cc: <stable@kernel.org> # .32.x .33.x Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20100427101348.GC4489@alberich.amd.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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1 changed files with 7 additions and 5 deletions
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@ -546,11 +546,13 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
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* check OSVW bit for CPUs that are not affected
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* by erratum #400
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*/
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rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
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if (val >= 2) {
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rdmsrl(MSR_AMD64_OSVW_STATUS, val);
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if (!(val & BIT(1)))
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goto no_c1e_idle;
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if (cpu_has(c, X86_FEATURE_OSVW)) {
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rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
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if (val >= 2) {
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rdmsrl(MSR_AMD64_OSVW_STATUS, val);
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if (!(val & BIT(1)))
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goto no_c1e_idle;
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}
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}
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return 1;
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}
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