x86: ticket spin locks: fix asm constraints
In addition to these changes I doubt the 'volatile' on all the ticket lock asm()-s are really necessary. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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1 changed files with 3 additions and 3 deletions
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@ -101,7 +101,7 @@ static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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: "=&a" (tmp), "=Q" (new), "+m" (lock->slock)
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: "=&a" (tmp), "=&Q" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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@ -146,7 +146,7 @@ static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
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/* don't need lfence here, because loads are in-order */
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"jmp 1b\n"
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"2:"
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: "+Q" (inc), "+m" (lock->slock), "=r" (tmp)
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: "+r" (inc), "+m" (lock->slock), "=&r" (tmp)
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:
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: "memory", "cc");
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}
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@ -166,7 +166,7 @@ static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
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"1:"
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"sete %b1\n\t"
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"movzbl %b1,%0\n\t"
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: "=&a" (tmp), "=r" (new), "+m" (lock->slock)
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: "=&a" (tmp), "=&q" (new), "+m" (lock->slock)
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:
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: "memory", "cc");
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