watchdog: w83627hf: Use helper functions to access superio registers
Use helper functions named similar to other drivers to access superio registers. Request memory region only when needed, and use request_muxed_region(). This lets other devices (hwmon, gpio) use the same region. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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ac461103c5
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1 changed files with 76 additions and 56 deletions
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@ -70,80 +70,102 @@ MODULE_PARM_DESC(nowayout,
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(same as EFER) */
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#define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
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static void w83627hf_select_wd_register(void)
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#define W83627HF_LD_WDT 0x08
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static void superio_outb(int reg, int val)
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{
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outb_p(0x87, WDT_EFER); /* Enter extended function mode */
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outb_p(0x87, WDT_EFER); /* Again according to manual */
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outb_p(0x07, WDT_EFER); /* point to logical device number reg */
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outb_p(0x08, WDT_EFDR); /* select logical device 8 (GPIO2) */
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outb(reg, WDT_EFER);
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outb(val, WDT_EFDR);
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}
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static void w83627hf_unselect_wd_register(void)
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static inline int superio_inb(int reg)
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{
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outb(reg, WDT_EFER);
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return inb(WDT_EFDR);
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}
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static int superio_enter(void)
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{
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if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
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return -EBUSY;
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outb_p(0x87, WDT_EFER); /* Enter extended function mode */
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outb_p(0x87, WDT_EFER); /* Again according to manual */
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return 0;
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}
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static void superio_select(int ld)
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{
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superio_outb(0x07, ld);
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}
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static void superio_exit(void)
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{
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outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
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release_region(wdt_io, 2);
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}
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/* tyan motherboards seem to set F5 to 0x4C ?
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* So explicitly init to appropriate value. */
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static void w83627hf_init(struct watchdog_device *wdog)
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static int w83627hf_init(struct watchdog_device *wdog)
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{
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int ret;
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unsigned char t;
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w83627hf_select_wd_register();
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ret = superio_enter();
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if (ret)
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return ret;
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outb(0x20, WDT_EFER); /* check chip version */
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t = inb(WDT_EFDR);
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superio_select(W83627HF_LD_WDT);
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t = superio_inb(0x20); /* check chip version */
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if (t == 0x82) { /* W83627THF */
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outb_p(0x2b, WDT_EFER); /* select GPIO3 */
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t = ((inb_p(WDT_EFDR) & 0xf7) | 0x04); /* select WDT0 */
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outb_p(0x2b, WDT_EFER);
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outb_p(t, WDT_EFDR); /* set GPIO3 to WDT0 */
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t = (superio_inb(0x2b) & 0xf7);
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superio_outb(0x2b, t | 0x04); /* set GPIO3 to WDT0 */
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} else if (t == 0x88 || t == 0xa0) { /* W83627EHF / W83627DHG */
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outb_p(0x2d, WDT_EFER); /* select GPIO5 */
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t = inb_p(WDT_EFDR) & ~0x01; /* PIN77 -> WDT0# */
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outb_p(0x2d, WDT_EFER);
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outb_p(t, WDT_EFDR); /* set GPIO5 to WDT0 */
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t = superio_inb(0x2d);
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superio_outb(0x2d, t & ~0x01); /* set GPIO5 to WDT0 */
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}
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outb_p(0x30, WDT_EFER); /* select CR30 */
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t = inb(WDT_EFDR);
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/* set CR30 bit 0 to activate GPIO2 */
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t = superio_inb(0x30);
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if (!(t & 0x01))
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outb_p(t | 0x01, WDT_EFDR); /* set bit 0 to activate GPIO2 */
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superio_outb(0x30, t | 0x01);
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outb_p(0xF6, WDT_EFER); /* Select CRF6 */
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t = inb_p(WDT_EFDR); /* read CRF6 */
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t = superio_inb(0xF6);
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if (t != 0) {
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pr_info("Watchdog already running. Resetting timeout to %d sec\n",
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wdog->timeout);
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outb_p(wdog->timeout, WDT_EFDR); /* Write back to CRF6 */
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superio_outb(0xF6, wdog->timeout);
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}
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outb_p(0xF5, WDT_EFER); /* Select CRF5 */
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t = inb_p(WDT_EFDR); /* read CRF5 */
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t &= ~0x0C; /* set second mode & disable keyboard
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turning off watchdog */
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t |= 0x02; /* enable the WDTO# output low pulse
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to the KBRST# pin (PIN60) */
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outb_p(t, WDT_EFDR); /* Write back to CRF5 */
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/* set second mode & disable keyboard turning off watchdog */
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t = superio_inb(0xF5) & ~0x0C;
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/* enable the WDTO# output low pulse to the KBRST# pin */
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t |= 0x02;
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superio_outb(0xF5, t);
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outb_p(0xF7, WDT_EFER); /* Select CRF7 */
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t = inb_p(WDT_EFDR); /* read CRF7 */
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t &= ~0xC0; /* disable keyboard & mouse turning off
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watchdog */
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outb_p(t, WDT_EFDR); /* Write back to CRF7 */
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/* disable keyboard & mouse turning off watchdog */
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t = superio_inb(0xF7) & ~0xC0;
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superio_outb(0xF7, t);
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w83627hf_unselect_wd_register();
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superio_exit();
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return 0;
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}
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static int wdt_set_time(unsigned int timeout)
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{
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w83627hf_select_wd_register();
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int ret;
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outb_p(0xF6, WDT_EFER); /* Select CRF6 */
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outb_p(timeout, WDT_EFDR); /* Write Timeout counter to CRF6 */
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ret = superio_enter();
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if (ret)
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return ret;
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w83627hf_unselect_wd_register();
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superio_select(W83627HF_LD_WDT);
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superio_outb(0xF6, timeout);
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superio_exit();
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return 0;
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}
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@ -168,13 +190,15 @@ static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
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static unsigned int wdt_get_time(struct watchdog_device *wdog)
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{
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unsigned int timeleft;
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int ret;
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w83627hf_select_wd_register();
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ret = superio_enter();
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if (ret)
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return 0;
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outb_p(0xF6, WDT_EFER); /* Select CRF6 */
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timeleft = inb_p(WDT_EFDR); /* Read Timeout counter to CRF6 */
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w83627hf_unselect_wd_register();
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superio_select(W83627HF_LD_WDT);
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timeleft = superio_inb(0xF6);
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superio_exit();
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return timeleft;
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}
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@ -231,20 +255,19 @@ static int __init wdt_init(void)
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pr_info("WDT driver for the Winbond(TM) W83627HF/THF/HG/DHG Super I/O chip initialising\n");
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if (!request_region(wdt_io, 1, WATCHDOG_NAME)) {
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pr_err("I/O address 0x%04x already in use\n", wdt_io);
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return -EIO;
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}
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watchdog_init_timeout(&wdt_dev, timeout, NULL);
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watchdog_set_nowayout(&wdt_dev, nowayout);
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w83627hf_init(&wdt_dev);
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ret = w83627hf_init(&wdt_dev);
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if (ret) {
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pr_err("failed to initialize watchdog (err=%d)\n", ret);
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return ret;
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}
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ret = register_reboot_notifier(&wdt_notifier);
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if (ret != 0) {
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pr_err("cannot register reboot notifier (err=%d)\n", ret);
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goto unreg_regions;
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return ret;
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}
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ret = watchdog_register_device(&wdt_dev);
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@ -258,8 +281,6 @@ static int __init wdt_init(void)
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unreg_reboot:
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unregister_reboot_notifier(&wdt_notifier);
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unreg_regions:
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release_region(wdt_io, 1);
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return ret;
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}
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@ -267,7 +288,6 @@ static void __exit wdt_exit(void)
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{
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watchdog_unregister_device(&wdt_dev);
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unregister_reboot_notifier(&wdt_notifier);
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release_region(wdt_io, 1);
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}
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module_init(wdt_init);
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