drm/nvd0/disp: rewrite irq handler, should be somewhat sturdier now
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
f20ce9629f
commit
ee41779e76
1 changed files with 111 additions and 81 deletions
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@ -46,14 +46,7 @@ struct nvd0_display {
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} evo[1];
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} evo[1];
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struct tasklet_struct tasklet;
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struct tasklet_struct tasklet;
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struct {
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u32 modeset;
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struct dcb_entry *dis;
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struct dcb_entry *ena;
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u32 modeset;
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int crtc;
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int pclk;
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u16 cfg;
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} irq;
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};
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};
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static struct nvd0_display *
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static struct nvd0_display *
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@ -965,6 +958,23 @@ nvd0_sor_create(struct drm_connector *connector, struct dcb_entry *dcbe)
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/******************************************************************************
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/******************************************************************************
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* IRQ
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* IRQ
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*****************************************************************************/
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*****************************************************************************/
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static void
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debug_irq(struct drm_device *dev, int i)
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{
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if (drm_debug & (DRM_UT_DRIVER | DRM_UT_KMS)) {
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NV_INFO(dev, "PDISP: modeset req %d\n", i);
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NV_INFO(dev, " STAT: 0x%08x 0x%08x 0x%08x\n",
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nv_rd32(dev, 0x6101d0),
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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for (i = 0; i < 8; i++) {
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NV_INFO(dev, " %s%d: 0x%08x 0x%08x\n",
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i < 4 ? "DAC" : "SOR", i,
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nv_rd32(dev, 0x640180 + (i * 0x20)),
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nv_rd32(dev, 0x660180 + (i * 0x20)));
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}
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}
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}
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static struct dcb_entry *
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static struct dcb_entry *
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lookup_dcb(struct drm_device *dev, int id, u32 mc)
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lookup_dcb(struct drm_device *dev, int id, u32 mc)
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{
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{
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@ -981,6 +991,7 @@ lookup_dcb(struct drm_device *dev, int id, u32 mc)
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case 0x00000200: type = OUTPUT_TMDS; break;
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case 0x00000200: type = OUTPUT_TMDS; break;
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case 0x00000500: type = OUTPUT_TMDS; break;
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case 0x00000500: type = OUTPUT_TMDS; break;
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default:
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default:
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NV_ERROR(dev, "PDISP: unknown SOR mc 0x%08x\n", mc);
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return NULL;
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return NULL;
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}
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}
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@ -993,49 +1004,36 @@ lookup_dcb(struct drm_device *dev, int id, u32 mc)
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return dcb;
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return dcb;
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}
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}
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NV_INFO(dev, "PDISP: DCB for %d/0x%08x not found\n", id, mc);
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NV_ERROR(dev, "PDISP: DCB for %d/0x%08x not found\n", id, mc);
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return NULL;
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return NULL;
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}
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}
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static void
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static void
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nvd0_display_unk1_handler(struct drm_device *dev)
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nvd0_display_unk1_handler(struct drm_device *dev)
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{
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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struct dcb_entry *dcb;
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u32 unkn, crtc = 0;
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u32 mask, crtc;
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int i;
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int i;
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NV_INFO(dev, "PDISP: 1 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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mask = nv_rd32(dev, 0x6101d4);
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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crtc = 0;
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if (!mask) {
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unkn = nv_rd32(dev, 0x6101d4);
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mask = nv_rd32(dev, 0x6109d4);
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if (!unkn) {
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unkn = nv_rd32(dev, 0x6109d4);
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crtc = 1;
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crtc = 1;
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}
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}
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debug_irq(dev, 1);
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disp->irq.ena = NULL;
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for (i = 0; mask && i < 8; i++) {
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disp->irq.dis = NULL;
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disp->irq.crtc = crtc;
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disp->irq.pclk = nv_rd32(dev, 0x660450 + (disp->irq.crtc * 0x300));
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disp->irq.pclk /= 1000;
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for (i = 0; i < 8; i++) {
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u32 mcc = nv_rd32(dev, 0x640180 + (i * 0x20));
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u32 mcc = nv_rd32(dev, 0x640180 + (i * 0x20));
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u32 mcp = nv_rd32(dev, 0x660180 + (i * 0x20));
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if (!(mcc & (1 << crtc)))
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continue;
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if (mcc & (1 << crtc))
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dcb = lookup_dcb(dev, i, mcc);
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disp->irq.dis = lookup_dcb(dev, i, mcc);
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if (!dcb)
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continue;
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if (mcp & (1 << crtc)) {
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disp->irq.cfg = nv_rd32(dev, 0x660184 + (i * 0x20));
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disp->irq.ena = lookup_dcb(dev, i, mcp);
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}
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}
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dcb = disp->irq.dis;
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if (dcb)
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nouveau_bios_run_display_table(dev, 0x0000, -1, dcb, crtc);
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nouveau_bios_run_display_table(dev, 0x0000, -1, dcb, crtc);
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}
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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@ -1045,49 +1043,70 @@ nvd0_display_unk1_handler(struct drm_device *dev)
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static void
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static void
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nvd0_display_unk2_handler(struct drm_device *dev)
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nvd0_display_unk2_handler(struct drm_device *dev)
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{
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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struct dcb_entry *dcb;
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int crtc = disp->irq.crtc;
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u32 mask, crtc, pclk;
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int pclk = disp->irq.pclk;
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u32 or, tmp;
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int or;
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int i;
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u32 tmp;
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NV_INFO(dev, "PDISP: 2 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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mask = nv_rd32(dev, 0x6101d4);
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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crtc = 0;
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if (!mask) {
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mask = nv_rd32(dev, 0x6109d4);
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crtc = 1;
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}
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debug_irq(dev, 2);
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for (i = 0; mask && i < 8; i++) {
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u32 mcc = nv_rd32(dev, 0x640180 + (i * 0x20));
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if (!(mcc & (1 << crtc)))
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continue;
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dcb = lookup_dcb(dev, i, mcc);
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if (!dcb)
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continue;
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dcb = disp->irq.dis;
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disp->irq.dis = NULL;
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if (dcb)
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nouveau_bios_run_display_table(dev, 0x0000, -2, dcb, crtc);
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nouveau_bios_run_display_table(dev, 0x0000, -2, dcb, crtc);
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}
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nv50_crtc_set_clock(dev, crtc, pclk);
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pclk = nv_rd32(dev, 0x660450 + (crtc * 0x300)) / 1000;
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if (mask & 0x00010000) {
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nv50_crtc_set_clock(dev, crtc, pclk);
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}
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dcb = disp->irq.ena;
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for (i = 0; mask && i < 8; i++) {
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if (!dcb)
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u32 mcp = nv_rd32(dev, 0x660180 + (i * 0x20));
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goto ack;
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u32 cfg = nv_rd32(dev, 0x660184 + (i * 0x20));
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or = ffs(dcb->or) - 1;
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if (!(mcp & (1 << crtc)))
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continue;
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nouveau_bios_run_display_table(dev, disp->irq.cfg, pclk, dcb, crtc);
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dcb = lookup_dcb(dev, i, mcp);
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if (!dcb)
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continue;
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or = ffs(dcb->or) - 1;
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nv_wr32(dev, 0x612200 + (crtc * 0x800), 0x00000000);
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nouveau_bios_run_display_table(dev, cfg, pclk, dcb, crtc);
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switch (dcb->type) {
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case OUTPUT_ANALOG:
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nv_wr32(dev, 0x612200 + (crtc * 0x800), 0x00000000);
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nv_wr32(dev, 0x612280 + (or * 0x800), 0x00000000);
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switch (dcb->type) {
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break;
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case OUTPUT_ANALOG:
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case OUTPUT_TMDS:
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nv_wr32(dev, 0x612280 + (or * 0x800), 0x00000000);
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case OUTPUT_LVDS:
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break;
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if (disp->irq.cfg & 0x00000100)
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case OUTPUT_TMDS:
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tmp = 0x00000101;
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case OUTPUT_LVDS:
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else
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if (cfg & 0x00000100)
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tmp = 0x00000000;
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tmp = 0x00000101;
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else
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tmp = 0x00000000;
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nv_mask(dev, 0x612300 + (or * 0x800), 0x00000707, tmp);
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break;
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default:
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break;
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}
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nv_mask(dev, 0x612300 + (or * 0x800), 0x00000707, tmp);
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break;
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default:
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break;
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break;
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}
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}
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ack:
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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@ -1096,22 +1115,33 @@ nvd0_display_unk2_handler(struct drm_device *dev)
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static void
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static void
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nvd0_display_unk4_handler(struct drm_device *dev)
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nvd0_display_unk4_handler(struct drm_device *dev)
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{
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{
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struct nvd0_display *disp = nvd0_display(dev);
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struct dcb_entry *dcb;
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struct dcb_entry *dcb;
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int crtc = disp->irq.crtc;
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u32 mask, crtc;
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int pclk = disp->irq.pclk;
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int pclk, i;
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NV_INFO(dev, "PDISP: 4 0x%08x 0x%08x 0x%08x\n", nv_rd32(dev, 0x6101d0),
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mask = nv_rd32(dev, 0x6101d4);
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nv_rd32(dev, 0x6101d4), nv_rd32(dev, 0x6109d4));
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crtc = 0;
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if (!mask) {
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mask = nv_rd32(dev, 0x6109d4);
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crtc = 1;
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}
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debug_irq(dev, 4);
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dcb = disp->irq.ena;
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pclk = nv_rd32(dev, 0x660450 + (crtc * 0x300)) / 1000;
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disp->irq.ena = NULL;
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if (!dcb)
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goto ack;
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nouveau_bios_run_display_table(dev, disp->irq.cfg, pclk, dcb, crtc);
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for (i = 0; mask && i < 8; i++) {
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u32 mcp = nv_rd32(dev, 0x660180 + (i * 0x20));
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u32 cfg = nv_rd32(dev, 0x660184 + (i * 0x20));
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if (!(mcp & (1 << crtc)))
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continue;
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dcb = lookup_dcb(dev, i, mcp);
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if (!dcb)
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continue;
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nouveau_bios_run_display_table(dev, cfg, -pclk, dcb, crtc);
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}
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ack:
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6101d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6109d4, 0x00000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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nv_wr32(dev, 0x6101d0, 0x80000000);
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@ -1123,11 +1153,11 @@ nvd0_display_bh(unsigned long data)
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struct drm_device *dev = (struct drm_device *)data;
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struct drm_device *dev = (struct drm_device *)data;
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struct nvd0_display *disp = nvd0_display(dev);
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struct nvd0_display *disp = nvd0_display(dev);
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if (disp->irq.modeset & 0x00000001)
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if (disp->modeset & 0x00000001)
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nvd0_display_unk1_handler(dev);
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nvd0_display_unk1_handler(dev);
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if (disp->irq.modeset & 0x00000002)
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if (disp->modeset & 0x00000002)
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nvd0_display_unk2_handler(dev);
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nvd0_display_unk2_handler(dev);
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if (disp->irq.modeset & 0x00000004)
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if (disp->modeset & 0x00000004)
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nvd0_display_unk4_handler(dev);
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nvd0_display_unk4_handler(dev);
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}
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}
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@ -1159,7 +1189,7 @@ nvd0_display_intr(struct drm_device *dev)
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u32 stat = nv_rd32(dev, 0x6100ac);
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u32 stat = nv_rd32(dev, 0x6100ac);
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if (stat & 0x00000007) {
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if (stat & 0x00000007) {
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disp->irq.modeset = stat;
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disp->modeset = stat;
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tasklet_schedule(&disp->tasklet);
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tasklet_schedule(&disp->tasklet);
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nv_wr32(dev, 0x6100ac, (stat & 0x00000007));
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nv_wr32(dev, 0x6100ac, (stat & 0x00000007));
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