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dt/bindings: Add bindings for PIC32 interrupt controller

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Document the devicetree bindings for the interrupt controller on
Microchip PIC32 class devices.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/12093/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Cristian Birsan 2016-01-13 18:15:34 -07:00 committed by Ralf Baechle
parent 70ce14bfc9
commit edf2194dc9
1 changed files with 67 additions and 0 deletions
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Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt Normal file
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Microchip PIC32 Interrupt Controller
====================================
The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
It handles all internal and external interrupts. This controller exists outside
of the CPU and is the arbitrator of all interrupts (including interrupts from
the CPU itself) before they are presented to the CPU.
External interrupts have a software configurable edge polarity. Non external
interrupts have a type and polarity that is determined by the source of the
interrupt.
Required properties
-------------------
- compatible: Should be "microchip,pic32mzda-evic"
- reg: Specifies physical base address and size of register range.
- interrupt-controller: Identifies the node as an interrupt controller.
- #interrupt cells: Specifies the number of cells used to encode an interrupt
source connected to this controller. The value shall be 2 and interrupt
descriptor shall have the following format:
<hw_irq irq_type>
hw_irq - represents the hardware interrupt number as in the data sheet.
irq_type - is used to describe the type and polarity of an interrupt. For
internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
Optional properties
-------------------
- microchip,external-irqs: u32 array of external interrupts with software
polarity configuration. This array corresponds to the bits in the INTCON
SFR.
Example
-------
evic: interrupt-controller@1f810000 {
compatible = "microchip,pic32mzda-evic";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x1f810000 0x1000>;
microchip,external-irqs = <3 8 13 18 23>;
};
Each device/peripheral must request its interrupt line with the associated type
and polarity.
Internal interrupt DTS snippet
------------------------------
device@1f800000 {
...
interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
...
};
External interrupt DTS snippet
------------------------------
device@1f800000 {
...
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
...
};