USB: xhci: Don't flush doorbell writes.
To tell the host controller that there are transfers on the endpoint rings, we need to ring the endpoint doorbell. This is a PCI MMIO write, which can be delayed until another register read is queued. The previous code would flush the doorbell write by reading the doorbell register after the write. This may take time, and it's not necessary to force the host controller to know about the transfers right away. Don't flush the doorbell register writes. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -337,11 +337,6 @@ static void ring_ep_doorbell(struct xhci_hcd *xhci,
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field = xhci_readl(xhci, db_addr) & DB_MASK;
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field |= EPI_TO_DB(ep_index) | STREAM_ID_TO_DB(stream_id);
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xhci_writel(xhci, field, db_addr);
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/* Flush PCI posted writes - FIXME Matthew Wilcox says this
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* isn't time-critical and we shouldn't make the CPU wait for
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* the flush.
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*/
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xhci_readl(xhci, db_addr);
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}
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}
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