pcmcia: at91_cf: Use syscon to configure the MC/smc
Use syscon/regmap to configure the smc part of the memory controller. This allows to avoid using mach/at91rm9200_mc.h and mach/at91_ramc.h and to compile the driver in a multiplatform configuration. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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0506b2986c
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2 changed files with 14 additions and 12 deletions
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@ -277,7 +277,6 @@ config AT91_CF
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tristate "AT91 CompactFlash Controller"
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depends on PCI
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depends on PCMCIA && ARCH_AT91
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depends on !ARCH_MULTIPLATFORM
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help
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Say Y here to support the CompactFlash controller on AT91 chips.
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Or choose M to compile the driver as a module named "at91_cf".
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@ -20,16 +20,15 @@
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#include <linux/platform_data/atmel.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/atmel-mc.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/regmap.h>
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#include <pcmcia/ss.h>
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#include <mach/at91rm9200_mc.h>
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#include <mach/at91_ramc.h>
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/*
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* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
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* some other bit in {A24,A22..A11} is nREG to flag memory access
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@ -40,6 +39,8 @@
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#define CF_IO_PHYS (1 << 23)
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#define CF_MEM_PHYS (0x017ff800)
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struct regmap *mc;
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/*--------------------------------------------------------------------------*/
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struct at91_cf_socket {
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@ -155,10 +156,7 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
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/*
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* Use 16 bit accesses unless/until we need 8-bit i/o space.
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*/
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csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
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/*
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*
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* NOTE: this CF controller ignores IOIS16, so we can't really do
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* MAP_AUTOSZ. The 16bit mode allows single byte access on either
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* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
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@ -169,13 +167,14 @@ static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
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* CF 3.0 spec table 35 also giving the D8-D15 option.
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*/
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if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
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csr |= AT91_SMC_DBW_8;
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csr = AT91_MC_SMC_DBW_8;
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dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
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} else {
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csr |= AT91_SMC_DBW_16;
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csr = AT91_MC_SMC_DBW_16;
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dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
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}
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at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
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regmap_update_bits(mc, AT91_MC_SMC_CSR(cf->board->chipselect),
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AT91_MC_SMC_DBW, csr);
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io->start = cf->socket.io_offset;
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io->stop = io->start + SZ_2K - 1;
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@ -236,6 +235,10 @@ static int at91_cf_dt_init(struct platform_device *pdev)
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pdev->dev.platform_data = board;
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mc = syscon_regmap_lookup_by_compatible("atmel,at91rm9200-sdramc");
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if (IS_ERR(mc))
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return PTR_ERR(mc);
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return 0;
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}
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#else
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