[ALSA] sparc dbri: SMP fixes
The dbri driver hangs when used in kernel compiled with SMP support due to inproper locking. The patch fixes it. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
Krzysztof Helt
Jaroslav Kysela
parent
679e28eef8
commit
ea543f1ee6
1 changed files with 48 additions and 17 deletions
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@ -635,10 +635,16 @@ to send them to the DBRI.
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static void dbri_cmdwait(struct snd_dbri *dbri)
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{
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int maxloops = MAXLOOPS;
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unsigned long flags;
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/* Delay if previous commands are still being processed */
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while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P))
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spin_lock_irqsave(&dbri->lock, flags);
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while ((--maxloops) > 0 && (sbus_readl(dbri->regs + REG0) & D_P)) {
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spin_unlock_irqrestore(&dbri->lock, flags);
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msleep_interruptible(1);
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spin_lock_irqsave(&dbri->lock, flags);
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}
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spin_unlock_irqrestore(&dbri->lock, flags);
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if (maxloops == 0) {
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printk(KERN_ERR "DBRI: Chip never completed command buffer\n");
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@ -671,11 +677,12 @@ static s32 *dbri_cmdlock(struct snd_dbri * dbri, int len)
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* the last WAIT cmd and force DBRI to reread the cmd.
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* The JUMP cmd points to the new cmd string.
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* It also releases the cmdlock spinlock.
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*
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* Lock must not be held before calling this.
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*/
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static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len)
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{
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s32 tmp, addr;
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unsigned long flags;
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static int wait_id = 0;
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wait_id++;
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@ -706,12 +713,10 @@ static void dbri_cmdsend(struct snd_dbri * dbri, s32 * cmd,int len)
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}
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#endif
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spin_lock_irqsave(&dbri->lock, flags);
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/* Reread the last command */
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tmp = sbus_readl(dbri->regs + REG0);
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tmp |= D_P;
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sbus_writel(tmp, dbri->regs + REG0);
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spin_unlock_irqrestore(&dbri->lock, flags);
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dbri->cmdptr = cmd;
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spin_unlock(&dbri->cmdlock);
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@ -777,9 +782,9 @@ static void dbri_initialize(struct snd_dbri * dbri)
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dma_addr = dbri->dma_dvma + dbri_dma_off(cmd, 0);
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sbus_writel(dma_addr, dbri->regs + REG8);
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spin_unlock(&dbri->cmdlock);
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dbri_cmdwait(dbri);
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spin_unlock_irqrestore(&dbri->lock, flags);
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dbri_cmdwait(dbri);
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}
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/*
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@ -840,6 +845,9 @@ static void reset_pipe(struct snd_dbri * dbri, int pipe)
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dbri->pipes[pipe].first_desc = -1;
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}
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/*
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* Lock must be held before calling this.
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*/
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static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp)
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{
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if (pipe < 0 || pipe > DBRI_MAX_PIPE) {
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@ -866,6 +874,9 @@ static void setup_pipe(struct snd_dbri * dbri, int pipe, int sdp)
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reset_pipe(dbri, pipe);
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}
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/*
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* Lock must be held before calling this.
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*/
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static void link_time_slot(struct snd_dbri * dbri, int pipe,
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int prevpipe, int nextpipe,
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int length, int cycle)
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@ -920,6 +931,10 @@ static void link_time_slot(struct snd_dbri * dbri, int pipe,
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dbri_cmdsend(dbri, cmd, 4);
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}
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#if 0
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/*
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* Lock must be held before calling this.
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*/
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static void unlink_time_slot(struct snd_dbri * dbri, int pipe,
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enum in_or_out direction, int prevpipe,
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int nextpipe)
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@ -952,6 +967,7 @@ static void unlink_time_slot(struct snd_dbri * dbri, int pipe,
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dbri_cmdsend(dbri, cmd, 4);
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}
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#endif
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/* xmit_fixed() / recv_fixed()
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*
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@ -965,11 +981,14 @@ static void unlink_time_slot(struct snd_dbri * dbri, int pipe,
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* the actual time slot is. The interrupt handler takes care of bit
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* ordering and alignment. An 8-bit time slot will always end up
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* in the low-order 8 bits, filled either MSB-first or LSB-first,
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* depending on the settings passed to setup_pipe()
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* depending on the settings passed to setup_pipe().
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*
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* Lock must not be held before calling it.
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*/
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static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data)
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{
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s32 *cmd;
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unsigned long flags;
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if (pipe < 16 || pipe > DBRI_MAX_PIPE) {
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printk(KERN_ERR "DBRI: xmit_fixed: Illegal pipe number\n");
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@ -1002,8 +1021,11 @@ static void xmit_fixed(struct snd_dbri * dbri, int pipe, unsigned int data)
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*(cmd++) = data;
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*(cmd++) = DBRI_CMD(D_PAUSE, 0, 0);
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spin_lock_irqsave(&dbri->lock, flags);
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dbri_cmdsend(dbri, cmd, 3);
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spin_unlock_irqrestore(&dbri->lock, flags);
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dbri_cmdwait(dbri);
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}
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static void recv_fixed(struct snd_dbri * dbri, int pipe, volatile __u32 * ptr)
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@ -1039,6 +1061,8 @@ static void recv_fixed(struct snd_dbri * dbri, int pipe, volatile __u32 * ptr)
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* be spread across multiple descriptors.
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*
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* All descriptors create a ring buffer.
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*
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* Lock must be held before calling this.
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*/
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static int setup_descs(struct snd_dbri * dbri, int streamno, unsigned int period)
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{
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@ -1186,6 +1210,9 @@ multiplexed serial interface which the DBRI can operate in either master
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enum master_or_slave { CHImaster, CHIslave };
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/*
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* Lock must not be held before calling it.
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*/
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static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_slave,
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int bits_per_frame)
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{
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@ -1258,9 +1285,14 @@ static void reset_chi(struct snd_dbri * dbri, enum master_or_slave master_or_sla
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In the standard SPARC audio configuration, the CS4215 codec is attached
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to the DBRI via the CHI interface and few of the DBRI's PIO pins.
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* Lock must not be held before calling it.
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*/
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static void cs4215_setup_pipes(struct snd_dbri * dbri)
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{
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unsigned long flags;
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spin_lock_irqsave(&dbri->lock, flags);
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/*
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* Data mode:
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* Pipe 4: Send timeslots 1-4 (audio data)
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@ -1284,6 +1316,7 @@ static void cs4215_setup_pipes(struct snd_dbri * dbri)
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setup_pipe(dbri, 17, D_SDP_FIXED | D_SDP_TO_SER | D_SDP_MSB);
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setup_pipe(dbri, 18, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);
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setup_pipe(dbri, 19, D_SDP_FIXED | D_SDP_FROM_SER | D_SDP_MSB);
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spin_unlock_irqrestore(&dbri->lock, flags);
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dbri_cmdwait(dbri);
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}
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@ -1358,6 +1391,7 @@ static void cs4215_open(struct snd_dbri * dbri)
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{
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int data_width;
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u32 tmp;
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unsigned long flags;
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dprintk(D_MM, "cs4215_open: %d channels, %d bits\n",
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dbri->mm.channels, dbri->mm.precision);
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@ -1382,6 +1416,7 @@ static void cs4215_open(struct snd_dbri * dbri)
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* bits. The CS4215, it seems, observes TSIN (the delayed signal)
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* even if it's the CHI master. Don't ask me...
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*/
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spin_lock_irqsave(&dbri->lock, flags);
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tmp = sbus_readl(dbri->regs + REG0);
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tmp &= ~(D_C); /* Disable CHI */
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sbus_writel(tmp, dbri->regs + REG0);
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@ -1409,6 +1444,7 @@ static void cs4215_open(struct snd_dbri * dbri)
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tmp = sbus_readl(dbri->regs + REG0);
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tmp |= D_C; /* Enable CHI */
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sbus_writel(tmp, dbri->regs + REG0);
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spin_unlock_irqrestore(&dbri->lock, flags);
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cs4215_setdata(dbri, 0);
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}
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@ -1420,6 +1456,7 @@ static int cs4215_setctrl(struct snd_dbri * dbri)
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{
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int i, val;
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u32 tmp;
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unsigned long flags;
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/* FIXME - let the CPU do something useful during these delays */
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@ -1456,6 +1493,7 @@ static int cs4215_setctrl(struct snd_dbri * dbri)
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* done in hardware by a TI 248 that delays the DBRI->4215
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* frame sync signal by eight clock cycles. Anybody know why?
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*/
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spin_lock_irqsave(&dbri->lock, flags);
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tmp = sbus_readl(dbri->regs + REG0);
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tmp &= ~D_C; /* Disable CHI */
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sbus_writel(tmp, dbri->regs + REG0);
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@ -1472,14 +1510,17 @@ static int cs4215_setctrl(struct snd_dbri * dbri)
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link_time_slot(dbri, 17, 16, 16, 32, dbri->mm.offset);
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link_time_slot(dbri, 18, 16, 16, 8, dbri->mm.offset);
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link_time_slot(dbri, 19, 18, 16, 8, dbri->mm.offset + 48);
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spin_unlock_irqrestore(&dbri->lock, flags);
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/* Wait for the chip to echo back CLB (Control Latch Bit) as zero */
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dbri->mm.ctrl[0] &= ~CS4215_CLB;
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xmit_fixed(dbri, 17, *(int *)dbri->mm.ctrl);
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spin_lock_irqsave(&dbri->lock, flags);
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tmp = sbus_readl(dbri->regs + REG0);
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tmp |= D_C; /* Enable CHI */
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sbus_writel(tmp, dbri->regs + REG0);
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spin_unlock_irqrestore(&dbri->lock, flags);
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for (i = 10; ((dbri->mm.status & 0xe4) != 0x20); --i) {
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msleep_interruptible(1);
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@ -1688,6 +1729,7 @@ static void xmit_descs(struct snd_dbri *dbri)
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dbri->pipes[info->pipe].desc = first_td;
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}
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}
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spin_unlock_irqrestore(&dbri->lock, flags);
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}
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@ -2093,7 +2135,6 @@ static int snd_dbri_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_dbri *dbri = snd_pcm_substream_chip(substream);
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struct dbri_streaminfo *info = DBRI_STREAM(dbri, substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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int ret;
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info->size = snd_pcm_lib_buffer_bytes(substream);
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@ -2232,7 +2273,6 @@ static int snd_cs4215_put_volume(struct snd_kcontrol *kcontrol,
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{
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struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
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struct dbri_streaminfo *info = &dbri->stream_info[kcontrol->private_value];
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unsigned long flags;
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int changed = 0;
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if (info->left_gain != ucontrol->value.integer.value[0]) {
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@ -2247,13 +2287,9 @@ static int snd_cs4215_put_volume(struct snd_kcontrol *kcontrol,
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/* First mute outputs, and wait 1/8000 sec (125 us)
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* to make sure this takes. This avoids clicking noises.
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*/
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spin_lock_irqsave(&dbri->lock, flags);
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cs4215_setdata(dbri, 1);
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udelay(125);
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cs4215_setdata(dbri, 0);
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spin_unlock_irqrestore(&dbri->lock, flags);
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}
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return changed;
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}
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@ -2300,7 +2336,6 @@ static int snd_cs4215_put_single(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_dbri *dbri = snd_kcontrol_chip(kcontrol);
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unsigned long flags;
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int elem = kcontrol->private_value & 0xff;
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int shift = (kcontrol->private_value >> 8) & 0xff;
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int mask = (kcontrol->private_value >> 16) & 0xff;
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@ -2333,13 +2368,9 @@ static int snd_cs4215_put_single(struct snd_kcontrol *kcontrol,
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/* First mute outputs, and wait 1/8000 sec (125 us)
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* to make sure this takes. This avoids clicking noises.
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*/
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spin_lock_irqsave(&dbri->lock, flags);
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cs4215_setdata(dbri, 1);
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udelay(125);
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cs4215_setdata(dbri, 0);
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spin_unlock_irqrestore(&dbri->lock, flags);
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}
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return changed;
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}
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